Drive Strength and Resolution in Verilog — How Node Values Are Decided

Chapter 12 · Section 12.3 · Switch-Level Modeling

1. The Engineering Problem

A switch-level node is rarely driven by just one thing — a CMOS gate has complementary networks, a bus has multiple drivers, a keeper fights an active driver. The value that appears on the node is decided by strength:

Every driven value carries a strength; when several drivers meet on a node, the strongest wins, equal-strength conflicts produce x, and equal-strength agreements keep the value. This resolution is how switch-level node values are determined.

This page drills the strength scale and the resolution rules — the engine of switch-level simulation.

2. Mental Model — Strongest Driver Wins; Ties Conflict or Agree

3. The Strength Scale

The default strength of a gate or continuous-assignment output is strong; power/ground are supply (the strongest, so they always win); pullup/pulldown are pull (weak keepers that lose to any normal driver). The resistive switches (12.2.4) reduce a passed value's strength by one level.

4. The Resolution Rules

When drivers D1 and D2 act on a node:

• Stronger strength wins — the node = the value and strength of the stronger driver. (strong 0 vs weak 1 → strong 0.)
• Equal strength, same value — the node keeps that value at that strength.
• Equal strength, opposite values — the node is x at that strength (an unresolvable conflict).
• A driver at highz contributes nothing — any real driver overrides it.

This is exactly why a pullup (pull strength) holds a bus when idle but yields to an enabled driver (strong strength): the strong driver wins. And why two strong drivers fighting over a wire produce x where they disagree (the multi-driver contention of Chapter 5.1.1, now in strength terms).

Visual A — strongest driver wins

5. Specifying Drive Strength

Strength can be given explicitly on gates and continuous assignments, as a (strength1, strength0) pair:

   // gate with explicit strength: strong 1, pull 0
   and (strong1, pull0) (y, a, b);
 
   // continuous assignment with strength:
   assign (weak1, weak0) y = a & b;
 
   // pull source (inherently pull strength):
   pullup (net);            // drives pull1

• The pair is (strength-for-1, strength-for-0) — e.g. (strong1, weak0) drives 1s strongly and 0s weakly (an open-drain-like behaviour).
• The default is (strong1, strong0) when no strength is given.
• Switch primitives carry inherent strengths (a switch passes its input's strength; resistive switches reduce it).

Explicit strengths let you model ratioed logic, open-drain/open-source outputs, and keepers — circuits where the relative strengths of drivers decide the node.

6. Common Mistakes

1. Equal-strength contention → x — two strong drivers disagreeing on a wire produce x (§4).
2. Expecting a pullup to override an active driver — pull loses to strong; the keeper only holds an idle node (§3/§4).
3. Ignoring resistive strength reduction — a resistive switch's output loses to a non-resistive driver (12.2.4).
4. Mis-ordering the strength pair — (strength1, strength0) — value-1 strength first (§5).

7. Debugging Lab

8. Interview Q&A

9. Exercises

Exercise 1 — Resolve the node

For each pair of drivers on a node, give the result: (a) strong 0 + weak 1; (b) strong 1 + strong 0; (c) pull 1 + highz; (d) supply 0 + strong 1.

Exercise 2 — Order the strengths

List the 8 strength levels from strongest to weakest.

Exercise 3 — Specify a strength

Write a continuous assignment that drives y = a with strong 1s and weak 0s.

Exercise 4 — Keeper behaviour

Explain why a pullup keeps an idle bus at 1 but a strong driver pulling low overrides it.

10. Summary

Drive-strength resolution decides switch-level node values:

• 8 strength levels — supply > strong > pull > large > weak > medium > small > highz; default driver strength is strong, power/ground are supply, keepers are pull.
• Strongest wins — the node takes the strongest driver's value; equal-strength conflict → x; equal-strength agreement keeps the value; highz loses to all.
• Specify strength with (strength1, strength0) on gates/assigns; switch outputs carry strength (resistive reduces it).

The discipline this page instils:

• Design so the intended driver is strongest — keepers pull, real drivers strong, power supply.
• Equal-strength contention is x — one driver per net for ordinary logic.

The chapter now applies all of this to real circuits: Chapter 12.4 Practical CMOS Circuits builds working CMOS structures at the switch level — tri-state buffers, latches, muxes, and complex gates — and 12.5 scales to larger examples.

Related Tutorials

• Signal Strengths — Chapter 5.1.2; the strength system this page deepens.
• Switch Level Primitives — Chapter 12.2; the switches whose outputs carry strength.
• Resistive MOS Switches — Chapter 12.2.4; the strength-reducing switches.
• tri0 and tri1 Nets — Chapter 5.1.5; pulled nets and keepers in strength terms.