Verilog · Chapter 14.7.1 · Behavioural Modeling
Generate for in Verilog — Replicating Module Instances & Blocks
The generate for loop is the structural replication workhorse of Verilog. It creates many copies of hardware structure, such as module instances, always blocks, and continuous assignments, when the design is elaborated, indexed by a genvar. With it, a parameterized module builds an array of N identical instances whose count scales with a width parameter, for example a ripple-carry adder from N full adders or a register file from N registers. The genvar is a compile-time index that picks which slice each copy works on. A named generate block gives every copy a clear hierarchical name for waveforms, constraints, and debug. This lesson covers the syntax, the genvar, instance-array patterns, and the named-block hierarchy.
Foundation13 min readVeriloggenerate forgenvarInstance ArrayStructural
Chapter 14 · Section 14.7.1 · Behavioural Modeling
1. The Engineering Problem
You need N identical module instances wired into a structure — and N is a parameter. A procedural for replicates logic, not instances; generate for replicates structure:
generate forreplicates structure — module instances,alwaysblocks, assignments — N times at elaboration, indexed by agenvar. It builds parameterized instance arrays.
This page drills generate for and the instance arrays it builds.
2. Mental Model — Replicate Structure, Indexed by a genvar
3. Syntax and the genvar
genvar i; // compile-time loop index
generate
for (i = 0; i < WIDTH; i = i + 1) begin : gen_loop // NAMED block
and_cell u (.a(a[i]), .b(b[i]), .y(y[i])); // one instance per i
end
endgenerategenvar i;declares the elaboration-time index (notinteger, which is for procedural loops).- The loop replicates the body
WIDTHtimes;iselects the slice each instance handles. - The named block
gen_loopmakes each instance addressable asgen_loop[0].u,gen_loop[1].u, … - The bound (
WIDTH) must be static (a parameter) — like all unrolled constructs.
4. Instance-Array Patterns
The common generate for structures:
// N-bit ripple-carry adder from N full_adder instances:
genvar i;
generate
for (i = 0; i < WIDTH; i = i + 1) begin : gen_fa
full_adder u (.a(a[i]), .b(b[i]), .cin(c[i]),
.sum(sum[i]), .cout(c[i+1]));
end
endgenerate
// a bank of N registers (always blocks):
generate
for (i = 0; i < N; i = i + 1) begin : gen_reg
always @(posedge clk) q[i] <= d[i];
end
endgenerate
// bit-sliced continuous assignments:
generate
for (i = 0; i < W; i = i + 1) begin : gen_inv
assign y[i] = ~a[i];
end
endgenerateRipple adders, register banks, and bit-sliced logic — all scale with the parameter. The genvar wires each replica to its slice (note the carry chain c[i] → c[i+1] in the adder). These are the parameterized structures generate for exists to build.
Visual A — generate for builds an instance array
5. Common Mistakes
- Using a procedural
forto instantiate modules — it can't; usegenerate for(§1, DebugLab 1). integerinstead ofgenvar— the generate-loop index must be agenvar(§3).- Unnamed generate block — name it for hierarchical referencing (§3).
- Runtime bound — the
genvarloop must be statically bounded (§3).
6. Debugging Lab
One generate-for debug post-mortem
7. Interview Q&A
8. Exercises
Exercise 1 — Build an instance array
Write a generate for that instantiates WIDTH inverter cells, one per bit of an input bus.
Exercise 2 — Procedural or generate?
For (a) a per-bit XOR computed inside an always block and (b) an array of N register sub-modules, which loop type fits each?
Exercise 3 — Hierarchy
Given a generate block named gen_fa replicating full_adder u, what is the hierarchical name of the third instance?
9. Summary
The generate for loop replicates structure at elaboration:
- Replicates structure — instances,
alwaysblocks, assignments —WIDTHtimes, indexed by agenvar. genvaris the compile-time index (notinteger); the bound must be static.- Named blocks give hierarchical names (
gen[0].u) for referencing. - Builds instance arrays — ripple adders, register banks, bit-sliced datapaths — that scale with a parameter.
The next sub-topic is conditional structure: Chapter 14.7.2 Generate if drills generate if — including or excluding hardware blocks based on a parameter.
Related Tutorials
- Generate Block — Chapter 14.7; the generate overview.
- For Loop — Chapter 14.6.1; the procedural loop (logic vs structure).
- Module Instantiation — Chapter 9.2; the instances generated here.
- parameter — Chapter 6.1; the parameter that sets the replication count.