All UVM Verification labs
UVM Verification Labs
Lab 8of 50
UVM Foundations and Simulation Lifecycle5
Driver, Monitor, Sequencer and Agent5
Sequences, Constraints and Stimulus Control5
Configuration, Factory and Reusability5
Scoreboards, Reference Models and Data Integrity5
Functional Coverage and Coverage Closure5
Protocol Verification and Multi-Agent Environments5
Reset, Concurrency and Advanced UVM Communication5
Debugging, Robustness and Verification Quality5
Production-Style UVM Verification Projects5
UVM-08Driver, Monitor, Sequencer and AgentPublished
Sequencer and Write/Read Sequence
How do you implement a sequencer and sequence to generate valid write/read transactions?
Foundation~75 min
Concepts covered
- uvm_sequencer
- Sequence body()
- start_item / finish_item
This lab is part of UVM Verification Labs
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