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VLSI Mentor
All UVM Verification labs
  1. UVM Foundations and Simulation Lifecycle5

  2. Driver, Monitor, Sequencer and Agent5

  3. Sequences, Constraints and Stimulus Control5

  4. Configuration, Factory and Reusability5

  5. Scoreboards, Reference Models and Data Integrity5

  6. Functional Coverage and Coverage Closure5

  7. Protocol Verification and Multi-Agent Environments5

  8. Reset, Concurrency and Advanced UVM Communication5

  9. Debugging, Robustness and Verification Quality5

  10. Production-Style UVM Verification Projects5

UVM-29Functional Coverage and Coverage ClosurePublished

Targeted Sequences for Packet-Router Coverage Closure

How do you develop targeted UVM sequences to close missing functional coverage on a packet router?

Advanced~120 min
Concepts covered
  • Coverage-driven stimulus
  • Targeted sequences
  • Closure iteration
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