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UVM Foundations and Simulation Lifecycle5
Driver, Monitor, Sequencer and Agent5
Sequences, Constraints and Stimulus Control5
Configuration, Factory and Reusability5
Scoreboards, Reference Models and Data Integrity5
Functional Coverage and Coverage Closure5
Protocol Verification and Multi-Agent Environments5
Reset, Concurrency and Advanced UVM Communication5
Debugging, Robustness and Verification Quality5
Production-Style UVM Verification Projects5
UVM-02UVM Foundations and Simulation LifecyclePublished
Reusable Transaction for a Register-Based DUT
How do you create a reusable UVM transaction for a synchronous register-based DUT?
Foundation~60 min
Concepts covered
- uvm_sequence_item
- Field automation
- do_copy / do_compare
This lab is part of UVM Verification Labs
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