All UVM Verification labs
UVM Verification Labs
Lab 48of 50
UVM Foundations and Simulation Lifecycle5
Driver, Monitor, Sequencer and Agent5
Sequences, Constraints and Stimulus Control5
Configuration, Factory and Reusability5
Scoreboards, Reference Models and Data Integrity5
Functional Coverage and Coverage Closure5
Protocol Verification and Multi-Agent Environments5
Reset, Concurrency and Advanced UVM Communication5
Debugging, Robustness and Verification Quality5
Production-Style UVM Verification Projects5
UVM-48Production-Style UVM Verification ProjectsPublished
Multi-Channel DMA Engine Verification
How do you verify a multi-channel DMA engine using coordinated bus agents, data integrity checks and error injection?
Expert~210 min
Concepts covered
- Coordinated bus agents
- Data-integrity checks
- Error injection
This lab is part of UVM Verification Labs
Unlock the complete lab with the UVM Verification Labs collection.
