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Lab 47of 50

  1. UVM Foundations and Simulation Lifecycle5

  2. Driver, Monitor, Sequencer and Agent5

  3. Sequences, Constraints and Stimulus Control5

  4. Configuration, Factory and Reusability5

  5. Scoreboards, Reference Models and Data Integrity5

  6. Functional Coverage and Coverage Closure5

  7. Protocol Verification and Multi-Agent Environments5

  8. Reset, Concurrency and Advanced UVM Communication5

  9. Debugging, Robustness and Verification Quality5

  10. Production-Style UVM Verification Projects5

UVM-47Production-Style UVM Verification ProjectsPublished

APB-Controlled UART Environment

How do you build a full UVM verification environment for an APB-controlled UART, including transmit and receive behavior?

Expert~180 min
Concepts covered
  • APB agent
  • UART serial agent
  • Transmit / receive checking
This lab is part of UVM Verification Labs

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