All UVM Verification labs
UVM Verification Labs
Lab 21of 50
UVM Foundations and Simulation Lifecycle5
Driver, Monitor, Sequencer and Agent5
Sequences, Constraints and Stimulus Control5
Configuration, Factory and Reusability5
Scoreboards, Reference Models and Data Integrity5
Functional Coverage and Coverage Closure5
Protocol Verification and Multi-Agent Environments5
Reset, Concurrency and Advanced UVM Communication5
Debugging, Robustness and Verification Quality5
Production-Style UVM Verification Projects5
UVM-21Scoreboards, Reference Models and Data IntegrityPublished
ALU Scoreboard with a Reference Model
How do you build a self-checking UVM scoreboard for an ALU with a reference model?
Intermediate~90 min
Concepts covered
- uvm_scoreboard
- Reference model
- Analysis imp
This lab is part of UVM Verification Labs
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