AMBA AXI · Module 18
Intermediate AXI Interview Questions
The intermediate AXI questions that separate competent from strong candidates — bursts (types, length, size, the 4 KB rule), transaction IDs and what they enable, ordering rules (same-ID vs. different-ID), WSTRB, and outstanding transactions — with the precise-core-plus-why answers and the connections interviewers want you to draw.
The beginner round (18.1) confirmed you know the fundamentals; the intermediate round tests whether you understand the mechanisms that make AXI high-performance — bursts, IDs, ordering, byte strobes, and outstanding transactions — and, crucially, how they connect. Intermediate questions are rarely standalone definitions; interviewers probe the relationships ("how do IDs enable out-of-order completion?", "why does the 4 KB rule exist?") because that's where understanding shows. The same answer discipline from 18.1 applies — precise core, then the why — but now the why often links two concepts, and the strongest answers draw the connection the interviewer is fishing for. This chapter covers the intermediate question set and the connections that distinguish a competent candidate from a strong one.
1. What Intermediate Questions Add: Connections
Where beginner questions test isolated facts, intermediate questions test how mechanisms relate. The interviewer wants to see you connect: IDs ↔ out-of-order completion, decoupled address/data ↔ outstanding transactions, burst SIZE/LEN ↔ the 4 KB rule, WSTRB ↔ partial writes. A strong intermediate answer doesn't just define the concept — it names what it enables or what constrains it, showing you understand AXI as a system of interacting mechanisms, not a list of features.
2. Bursts: Types, LEN, SIZE, and the 4 KB Rule
The burst question set is core to the intermediate round. "What are the burst types?" — FIXED (same address every beat, for a peripheral FIFO), INCR (address increments, the common case), WRAP (wraps within an aligned region, for cache-line fills). "What do AxLEN/AxSIZE mean?" — LEN = beats minus one; SIZE = log2(bytes per beat); together the span is (LEN+1) << SIZE. "What's the 4 KB rule and why?" — a burst must not cross a 4 KB boundary, because 4 KB is the minimum page size, so a burst stays within one page and thus one slave/one set of memory attributes — the connection (SIZE/LEN determine the span, which the rule constrains) is what the interviewer wants.
3. IDs and Ordering: The Connection They Probe Hardest
The ID/ordering pair is the intermediate round's signature probe, because it's where the connection is the answer. "What are transaction IDs for?" — they tag transactions so responses can be matched to requests, which enables multiple outstanding and out-of-order completion. "What are the ordering rules?" — responses for the same ID must return in request order; different IDs may complete in any order. The connection the interviewer wants: IDs are precisely the mechanism that makes out-of-order completion possible — same-ID stays ordered (so a producer/consumer dependency is preserved), different-ID is free (so independent transactions don't block each other). Stating the rule and why it's structured that way (ordering where needed, freedom where not) is the strong answer.
Different-ID out-of-order, same-ID in-order
9 cycles4. WSTRB and Outstanding: The Remaining Pair
Two more intermediate staples. "What is WSTRB?" — a per-byte write-enable (one bit per data byte); a set bit writes that byte, a clear bit preserves it — enabling partial-word and byte-granular writes (a register field, a sub-word store). The connection: WSTRB is why a write can update some bytes without read-modify-write. "What are outstanding transactions?" — transactions issued but not yet completed; AXI allows multiple in flight (via the decoupled address/data and IDs), which is what hides latency and sustains throughput. The connection the interviewer wants: outstanding capability comes from address/data decoupling plus IDs, and delivers latency tolerance — tying back to "why AXI is high-performance."
5. Common Misconceptions
6. Debugging Insight
7. Verification Insight
8. Interview Questions
9. Summary
Intermediate AXI questions test connections between mechanisms, not isolated facts — the answer discipline extends 18.1's "core + why" to "core + connection" (name what a concept enables, constrains, or ties back to). The burst set: types (FIXED/peripheral-FIFO, INCR/general, WRAP/cache-line), AxLEN (beats−1) and AxSIZE (log2 bytes/beat) with span (LEN+1) << SIZE, and the 4 KB rule (a burst stays within one page — minimum page size — so it maps to one slave and one set of attributes; the rule constrains the span the fields define). The ID/ordering pair is probed hardest: IDs tag transactions to enable out-of-order completion, and the rules are same-ID in order, different-ID in any order — ordering where there's a dependency, freedom where there isn't. Plus WSTRB (per-byte enable → partial writes without read-modify-write) and outstanding transactions (from decoupling+IDs, hiding latency for throughput).
The strong-answer skill is synthesis — tracing chains like decouple → outstanding → IDs → out-of-order → latency-hidden → throughput, which is the real "why AXI is high-performance" answer. Be ready to compute on the spot (span, increment, 4 KB-crossing) since interviewers test that the fields aren't just memorized labels. The failure mode is the definition without the connection, which reads as surface knowledge. The through-line deepens from 18.1: beginner articulates facts-with-why, intermediate articulates mechanisms-with-connections — and the synthesis ability that distinguishes a strong candidate is the same reasoning-about-interactions that makes you valuable in design and trade-off work. Next, the advanced round pushes to outstanding-depth tuning, deadlock, and interconnect architecture, where connections become multi-step system-level arguments.
10. What Comes Next
You can now connect the core mechanisms; next, the advanced round:
- 18.3 — Advanced Interview Questions (coming next) — outstanding-depth tuning, deadlock, and interconnect architecture, where the connections become multi-step, system-level arguments and the bar is genuine design judgment.
Previous: 18.1 — Beginner Interview Questions. Related: 7.1 — Burst Fundamentals and 7.6 — The 4 KB Boundary Rule for the burst set, and 8.2 — Transaction IDs and 8.4 — Different-ID Ordering for the ID/ordering pair.
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Beginner AXI Interview Questions
The fundamental AXI questions interviewers open with, and how to answer them crisply — what AXI is and why, the five channels, the VALID/READY handshake, reads vs. writes, and the one rule that must never be broken — with the structure of a strong beginner answer and the traps that signal a shallow one.
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Advanced AXI Interview Questions
The advanced AXI questions that test design judgment — outstanding-depth tuning, deadlock and how to prevent it, interconnect architecture and ID remapping, exclusive access, and CDC — where answers are multi-step system-level arguments and trade-offs, not facts, and the strongest responses reason about why rather than recite what.
Standards & specifications
- Governing standard
- Arm AMBA AXI Protocol Specification (IHI 0022)(opens Arm in a new tab)
Defines the AXI channels, handshake and ordering rules. RTL structure, interconnect topology and verification strategy are design choices this specification does not mandate.
This page also covers RTL structure, verification approach and debugging technique. Those are engineering practice built on the standard, not requirements the standard itself imposes.
Where this fits
Part of the AMBA AXI curriculum.
