USB tutorials, labs & MCQs.
The most complete USB curriculum on the internet — starting from the peripheral-connectivity problem USB was created to solve, through the host-centric architecture, physical layer, generations and speed modes, enumeration, descriptors, device states, endpoints, the four transfer types, packets, the transaction model, scheduling, hubs, power management, USB 3.x SuperSpeed dual-bus architecture, device-controller RTL, host-controller (EHCI / xHCI) overview, verification, debugging, SoC integration, interview mastery, real-industry case studies, and design-review checklists.
Tutorials
Learn USB from beginner to advanced through structured tutorials.
Labs
Practice USB using progressively challenging hands-on labs.
MCQs
No MCQ papers for USB yet.
What USB is
USB is the architecture a computer uses to attach, identify and talk to peripherals that arrive and leave while it is running. It is host-centric: one host controller initiates every transaction, devices only answer, and hubs extend the number of attachment points without adding host interfaces. Its defining move is that a device describes itself. When something is plugged in, the host detects it electrically and then enumerates it — assigns it an address and reads a set of descriptors stating what the device is, what endpoints it exposes and what power it needs — so configuration happens before any device-specific software is involved. Data then flows through endpoints under one of four transfer types, which is how a keyboard's occasional few bytes and a drive's sustained throughput share the same wires. In a chip project USB shows up twice: as a host controller and its driver stack, and as a device controller, PHY and firmware inside the peripheral itself.
Why it exists
Before a universal peripheral bus, each class of device attached through its own unrelated stack — its own connector, signalling, host controller, configuration story and driver model. Nothing was shared, so supporting a new class of peripheral meant new silicon and new software on the host, a device could not state what it was, capacity was fixed when the machine was built, attaching hardware while the system ran was largely undefined, and any device of appetite brought its own power supply. USB exists to collapse that into one attachment, discovery and transport layer, so the variety lives in what devices say rather than in how they are wired.
The part engineers get wrong
Standardisation did not make the engineering disappear; it made it reusable. A host controller, a device controller, a PHY, endpoint and protocol logic, firmware with correct descriptors and the class drivers above them are all real designs with real failure modes — the difference is that every party implements against one specification and can rely on the others honouring it. The practical consequence for a newcomer is where bring-up failures actually come from: a device that appears not to work is far more often a descriptor the host could not parse, or an endpoint configuration that does not match what the firmware does, than a signalling problem on the wire. Learn enumeration before you learn packets.
Before you start
- Digital design — synchronous logic, state machines and reset behaviour
- Basic familiarity with how a processor reaches hardware through registers and interrupts
- Helpful but not required: any prior exposure to a serial link, a device driver or an embedded firmware project
What you will be able to do
- Explain what problem a universal peripheral architecture solves, and why a shared connector alone does not solve it
- Describe the host-centric model and the tiered-star topology, and say what each rules out
- Walk the enumeration sequence from attachment detection to a configured device
- Read a descriptor set and say what the device is claiming about itself
- Choose a transfer type from a peripheral's traffic profile and justify the choice
- Reason about a device-controller design — endpoints, FIFOs and protocol state machines — and debug a bus from a protocol trace
The learning path
- Why USB existsThe peripheral-connectivity problem, the interfaces USB replaced, and the goals that followed from them
- Architecture overviewHost, devices, hubs and the host controller; the host-centric model and the tiered-star topology
- Physical layerDifferential signalling, the pull-up and pull-down mechanism, and how a device's speed is detected
- Generations and speedsUSB 1.x through USB4 — what each generation changed and how compatibility is preserved
- Enumeration and descriptorsHow a host discovers, addresses, interrogates and configures a device that has just arrived
- Endpoints and transfersControl, bulk, interrupt and isochronous — four service models over one bus
- Packets, transactions and schedulingThe wire-level units, the transaction model built from them, and how bus time is allocated
- Design, verification and debugDevice-controller RTL, host-controller architecture, protocol verification and analyser-driven debugging
Core concepts
New to USB? Work through the curriculum in order — each lesson assumes the one before it, and the sequence is what turns the roadmap above into working knowledge.
Already working with it? Use the core-concept links above to jump straight to the topic you need; each one opens the lesson that covers it in most depth.
Where this leads
Standards: USB Implementers Forum (USB-IF) — Publishes the Universal Serial Bus specifications and the device-class specifications layered on them