Wishbone · Module 30

Interview Checklist

Eight tests an engineering answer must survive, the claim audit that fails three plausible sentences, and the master review matrix for the module.

Module 28 owns interview preparation. This chapter owns something narrower and more useful:

Reviewing your own answer before you finish giving it.

The same discipline as the previous five chapters, pointed at a sentence instead of a design. An answer is a claim, and a claim without evidence behind it is a checkbox.

1. Eight Tests

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Snippet

STRONG ANSWER = MODEL + INVARIANT + TIMING + FAILURE + SCOPE + TRADE-OFF

test	asks	you failed it if
A — model	did I say what the mechanism is?	you named a signal and stopped
B — causality	did I say why it behaves that way?	your reason is "because the spec says so"
C — timing	can I walk it clock by clock?	you can only describe steady state
D — invariant	what must remain true?	you cannot state one
E — failure	what breaks if it does not?	you have no failure mode
F — scope	spec, policy, implementation, or system?	you did not say
G — evidence	could I prove it from RTL, waveform or text?	"I read it somewhere"
H — trade-off	what changes under another valid design?	your answer admits no alternative

2. Test F Is The One That Fails

Three sentences that sound competent. Reviewed:

"Wishbone times out if ACK takes too long." FAIL — local policy presented as protocol rule. B3 bounds no latency and defines no timeout. RECOMMENDATION 3.10 suggests a watchdog in an interconnect as one solution to deadlock. Chapter 30.4 measured a nine-clock wait that fired nothing and an unbounded one cut off at twenty — and the number 20 came from a requirements document. Repaired: "Wishbone has no timeout. If this system has a deadline it belongs to the interconnect, and the threshold is a requirement."

"A crossbar is faster." FAIL — workload and metric absent. Module 29 measured the same two topologies at 21 against 25 clocks with disjoint destinations and 25 against 25 with a shared one. Repaired: "A crossbar removes the shared interface transfers would queue on. Whether that is worth anything depends on whether the traffic goes to different slaves, and I would measure it before claiming it."

"ACK means the write happened." FAIL — conflates bus termination with local commit policy. ACK is a statement about the handshake. Chapter 30.1 measured a slave answering three transfers and committing eight times, and Chapter 30.3 measured seven acknowledged accesses reaching a peripheral the map does not assign them to. Repaired: "ACK ends the phase. What the slave did internally is its own commit policy, and it needs stating separately."

The audit: every strong word — must, always, never, illegal, violation, timeout, atomic, fairness, completion — gets a scope label before it leaves your mouth. Unclassified strong claims: 0 is the standard.

3. Follow-Up Resilience

Test H, operationalised. A memorised answer survives one question. Take any answer and change one constraint:

follow-up	what it re-opens
what if `ACK` is delayed?	everything that was true only at zero latency
what if two masters request?	ownership, provenance, and every "the" in your answer
what if the address is unmapped?	a policy you probably did not state
what if `ERR` is unsupported?	OBSERVATION 3.35, and your integration story
what if `SEL` writes one lane?	the merge, and whether your test could see it
what if the slave registers its termination?	one clock per transfer, and a timing path
what if this is B4 pipelined, not B3 Classic?	every timing claim you just made

The last one is the sharpest, and Module 29 measured why: max outstanding is 1 by construction in Classic and 4 in the pipelined model, on the same eight operations. An answer built on "the phase is open until its termination arrives" is a statement about one profile.

4. The Master Review Matrix

The compression of all six chapters. Every row is a thing that has been measured somewhere in this module.

review domain	key invariant	primary evidence	common false confidence	failure example	chapter
request stability	qualified signals hold at every boundary	two checkers, two boundaries	"the master port is clean"	0 moves at P0, 3 at P2	30.1
termination provenance	one termination, one live request, right owner	owner latched at phase start vs recipient	"the mux returns the `ACK`"	133 misdeliveries, 0 violations	30.4
exactly-once side effect	commits == accepted writes	commit census, non-idempotent target	"the stored value is right"	8 commits for 3 transfers	30.1
partial writes	untouched lanes preserved	seeded readback	"the bin is covered"	mask `f` for `2`, undetected	30.2
address ownership	expected owner == actual owner	boundary sweep, 9 probes	"`ACK` came back"	7 wrong owners, 0 violations	30.3
wait states	architectural result invariant to latency	same test at 0 and N waits	"the fast config passed"	defect impossible at 0 waits	30.1
error handling	every asserted class has a receiver	capability table	"the endpoint works alone"	39 `ERR`s into no input	30.4
arbitration	ownership stable across a phase	owner at start vs at end	"round-robin is fair"	fairness is local policy	30.4
timeout policy	threshold traceable to a requirement	expiry behaviour, drain plan	"we added a timeout"	9 clocks fine, 20 fatal	30.4
verification independence	predictor uses 0 design internals	input classification	"the scoreboard passed"	model disagrees, design right	30.2
defect sensitivity	observation differs if design is wrong	injection per covered feature	"coverage is 100%"	bin hit, defect escaped	30.2
X-safety	no unknown decides a pass	unknown counters on every observer	"no mismatch reported"	X compares equal, silently	30.2
counter width	metric can represent its maximum	0/1/2/5 negative control	"errors == 0"	2 failures report as 0	30.2
profile compatibility	both endpoints implement one contract	compatibility table	"it's Wishbone"	`STALL` exists or it does not	30.4
debug causality	cause ≤ divergence ≤ symptom	first-occurrence cycles	"the waveform looks right"	count 2 at 16 vs 3 at 4	30.5

5. The Review Escape Matrix

Why six chapters exist rather than one. Y means that layer catches it.

defect	compiles	protocol check	scoreboard	coverage	address review	integration review	debug review
moving request	Y	Y at P2 only	no	no	no	no	Y
duplicate side effect	Y	no	no	no	no	no	Y
wrong target	Y	no	partly	no	Y	Y	Y
address alias	Y	no	no	no	Y	Y	Y
widened byte mask, seeded	Y	no	Y	no	no	no	Y
widened byte mask, zero data	Y	no	no	covered	no	no	Y
response misroute	Y	no	no	no	no	Y	Y
`ERR` with no receiver	Y	no	no	no	no	Y	Y
reference model wrong	Y	no	Y, wrongly blaming the design	no	no	no	Y
counter width	Y	no	no	no	no	no	Y

Read the "compiles" column: every row is Y. Read the rows: no column is Y for every defect.

NO SINGLE DETECTOR PROVES SYSTEM CORRECTNESS. That is the argument for layered review, and it is a measurement rather than an opinion.

6. Priority

Not every item costs the same when it is wrong.

risk	definition	examples from this module
CRITICAL	can corrupt architectural state, misroute a response, or produce a false verification PASS	counter width, response misroute, address alias, defect-insensitive stimulus
HIGH	can deadlock, lose transactions, or hide defects	`ERR` with no receiver, duplicate commit, moving request
MEDIUM	incorrect local behaviour, bounded impact	reserved-region policy, offset arithmetic
CONTEXTUAL	depends entirely on system policy	timeout threshold, arbitration fairness, unmapped-access behaviour

Counter width sits in CRITICAL for a specific reason: it does not corrupt anything, it converts every other item into a false PASS. A defect in the thing that reports defects is the most expensive kind.

7. False Confidence

"The interview answer sounds correct." Proves: it is fluent. Does not prove: that it is scoped, causal, or survivable. All three sentences in §2 sound correct. Missing evidence: a scope label on every strong word, and one follow-up you have actually re-reasoned through.

8. The Answer Checklist

id	review question	classification
ANS-01	Did I state the mechanism, not just name the signal?	REVIEW HYGIENE
ANS-02	Did I give a cause, not a citation?	REVIEW HYGIENE
ANS-03	Can I walk it clock by clock if asked?	REVIEW HYGIENE
ANS-04	Did I state the invariant?	REVIEW HYGIENE
ANS-05	Did I state what breaks when it does not hold?	REVIEW HYGIENE
ANS-06	Is every strong word scoped — spec, policy, choice, measured?	REVIEW HYGIENE
ANS-07	Could I prove this from RTL, a waveform, or the specification text?	REVIEW HYGIENE
ANS-08	Did I name the alternative architecture and what it changes?	REVIEW HYGIENE
ANS-09	Did I say which half I measured and which I did not?	REVIEW HYGIENE
ANS-10	Does my answer survive one changed constraint?	REVIEW HYGIENE

9. What To Carry Forward

Review the sentence before you finish it. Scope is the test that fails, and it fails silently.
"Wishbone requires X" is a claim you can be wrong about in front of somebody who has read it.
A comparative claim needs a workload. 21 versus 25, or 25 versus 25, from the same two topologies.
Name the half you did not measure. It is stronger than asserting a number you do not have.
No single detector proves correctness — and the matrix in §5 is the measured form of that.
A defect in the thing that counts defects outranks everything else it was counting.

Module 30 ends here. Six review boundaries, twelve executed simulations, and one rule underneath all of them: a checkbox without evidence is not a review.

Continue learning

Standards & specifications

Governing standard: Wishbone SoC Interconnection Architecture (OpenCores)(opens OpenCores in a new tab)
Defines the Wishbone signal set, the bus cycles built from it and the interface rules a portable IP core must follow. It deliberately leaves interconnect topology, address map and arbitration policy to the integrator, so those are system decisions rather than requirements of the specification.

This page also covers RTL structure, verification approach and debugging technique. Those are engineering practice built on the standard, not requirements the standard itself imposes.

Where this fits

Part of the Wishbone curriculum.