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Wishbone · Module 30

Integration Checklist

A conformant slave and a conformant master, connected, deadlock — and the specification says so in advance. Plus profile compatibility and provenance.

A master can be correct. A slave can be correct. The system can still be wrong, and the specification tells you in advance that it can.

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INTEGRATION = COMPATIBILITY + OWNERSHIP + ROUTING + POLICY

Integration review is the only place those four are examined together, which is why it is the review most often skipped and most expensive to skip.

1. Two Conformant Endpoints, One Deadlock

INT-06. Does every endpoint observe every termination its counterpart can assert?

ERR_O and RTY_O are optional on both sides. PERMISSION 3.20 and PERMISSION 3.25 make them so. A master may omit ERR_I; a slave may implement ERR_O; neither is non-conformant.

Connect them:

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=== SIM H - INTEGRATION CAPABILITY MISMATCH ===

  the SAME slave, two masters, one reserved-offset write

  master            operations issued  operations RETIRED
  observes ERR                      2                   2
  no ERR input                      2                   1

  at the pins              ERR-aware rig   ERR-blind rig
  phases opened                        2               2
  ACK terminations                     1               1
  ERR terminations                     1              39
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  The ERR-blind rig's slave asserted ERR on 39 clocks. Its
  master retired 1 of 2 operations and is still waiting
  for an acknowledgement that will never come, because the
  only answer available is one it has no wire to receive.

Thirty-nine error terminations, asserted correctly, into a master with no input to receive them. The specification anticipates this exactly:

OBSERVATION 3.35 — If the SLAVE supports ERR_O or RTY_O, but the MASTER does not support these signals, deadlock may occur.

Note what that does not say. It does not say either component is wrong. Two conformant components can deadlock when integrated, and an observation in Chapter 3 of the bus specification is where that is written down.

PASS: every termination class an endpoint can assert is either observed by its counterpart or converted by something between them. FAIL: any asserted class with no receiver. The disposition for an unexamined pairing is NOT VERIFIED, and this is the item where that matters most, because the failure is invisible until the one access that triggers it.

2. Profile Compatibility

INT-01. What exact interface profile does each endpoint implement?

Module 29 inspected a crossbar whose header declares it conforms to the WB-B4 pipeline specification and whose ports carry STALL — a signal B3 Classic does not have. Classic and pipelined are not the same timing contract, and an adapter is not optional between them.

The artifact a review produces:

endpointprofileaddressingdataSELSTALL?ERR?RTY?outstandingadapter?
CPU wrapperClassicbyte324nonono1
register slaveClassicbyte324noyesno1required
memoryClassicbyte324nonoyes1
external IPNOT VERIFIEDNOT VERIFIED

Two rows there are the whole review. The ERR column disagrees between the first two — that is SIM H. And the last row is what an honest table looks like when nobody has read the datasheet yet. Do not invent compatibility to fill a cell.

An integration boundary between two endpoints, with the four review dimensions attached. Endpoint A on the left and endpoint B on the right are separated by an interconnect or bridge. Four questions sit on the boundary. Compatibility asks whether the profile, widths, addressing granularity and optional signals match. Ownership asks who owns the bus and whether that can change mid transfer. Routing asks which request a returning response belongs to. Policy asks what happens on an unmapped address, on a termination class nobody receives, and after a watchdog expires. Below, a note records that an endpoint correct in isolation says nothing about any of the four.endpoint Acorrect in isolationinterconnect /bridgewhere all four aredecidedendpoint Bcorrect in isolationCOMPATIBILITYprofile, widths,optional signalsOWNERSHIPwho owns it, can itmove?ROUTINGwhose response isthis?POLICYunmapped,unreceivable, expired12

3. Response Provenance

INT-09. Which request does this response belong to, and what guarantees it?

The unacceptable answer is "the mux sends the ACK back." That describes the wiring, not the invariant.

Four mechanisms are legitimate, and a review checks the assumption, not the mechanism:

mechanismthe assumption it rests onhow to check it
latched ownerthe latch is written at phase start and nowhere elseinspect the enable
live grantthe grant cannot change mid-phasefind what prevents it, in writing
structural one-outstandingthe master cannot issue a second requestinspect the master's FSM
transaction IDIDs are unique among outstanding transfersinspect the allocator

Row two is the one that keeps appearing in real code. Module 29 found a live-selector arbiter whose safety rests on a CPU property stated in a comment beside it — and a framework arbiter with the same structure and a parameter that fixes it.

Measured, with the owner and the recipient recorded as separate fields:

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=== SIM I - RESPONSE PROVENANCE ===

  rig         phases  owner moved  response misdelivered  first bad cycle
  correct           8            0                      0                0
  defective       133            0                    133                6

  M0 operations retired   correct 4   defective 0
  M1 operations retired   correct 4   defective 4
  protocol violations     correct 0   defective 0
  SPEC assertions         correct 0   defective 0
  LOCAL assertions        correct 0   defective 133

Zero protocol violations. Zero specification assertion failures. M1 retired four operations; M0 retired none, having issued four. M1 completed work using acknowledgements earned by M0's transfers.

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  The defective rig breaks no Wishbone rule and no
  specification assertion. It breaks a LOCAL invariant 133
  times, first at cycle 6. That invariant only exists
  because somebody recorded the owner and the recipient as
  two separate fields. A review that accepts the sentence
  'the mux returns the ACK' never asks the question.

PASS: misdeliveries 0, with the mechanism's assumption identified and checked. FAIL: any misdelivery, or an assumption nobody can state.

4. Timeout Is A Requirements Document

INT-12. Who owns the timer, what does expiry mean, and what is the residual risk?

B3 bounds no latency. The nearest it comes is:

RECOMMENDATION 3.10 — Design INTERCON modules to prevent deadlock. One solution is a watchdog timer function that monitors the MASTER's STB_O signal.

A recommendation, about an interconnect, offering one solution. Everything else is yours:

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=== SIM J - TIMEOUT IS LOCAL POLICY ===

  one watchdog, threshold 20 clocks, two targets

  target                    wait clocks  watchdog fired  data returned
  slow but finite (9)                 9              no  0x600d0004
  never answers               unbounded             yes  0xffffffff

  operations retired        2 of 2
  watchdog expiries         1
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  The first target waited nine clocks and nothing fired.
  The second was cut off at twenty. NOTHING IN WISHBONE
  DISTINGUISHES THEM - B3 bounds no latency. The number 20
  came from a requirements document, and a different number
  would have reclassified the first target as a failure.

Seven questions a timeout review must answer, and "we added a timeout" answers none of them:

questionwhy it bites
who owns the timer?a per-master timer and a per-interconnect timer fail differently
what starts and resets it?a timer that resets on any bus activity never fires
what does expiry assert — ACK, ERR, an exception?ACK un-hangs an ERR-blind master and hides the failure
is a late response possible?the target may wake up after you moved on
is stale target state drained?the next transfer may collect the previous one's answer
when may the bus reopen?too early and the drain problem arrives immediately
what residual risk remains?there always is some; name it

The third and fourth are where Module 10's drain problem lives, and a review that stops at "expiry returns ERR" has not reached it.

5. False Confidence

"The endpoint works alone." Proves: it satisfies its own datasheet against its own testbench. Does not prove: anything about the pairing. Both endpoints in SIM H pass standalone. Missing evidence: a compatibility table with no NOT VERIFIED rows on the pairings that ship.

"We added a timeout." Proves: the bus will reopen. Does not prove: that the failure is reported, that the late response is absorbed, or that the threshold came from anywhere. Missing evidence: the seven answers above.

6. The Integration Checklist

idreview questionclassification
INT-01What exact profile does each endpoint implement?SPEC REQUIRED
INT-02Do data width, address width and SEL width match at every join?SYSTEM INVARIANT
INT-03Do both sides agree on byte-versus-word addressing?SYSTEM INVARIANT
INT-04Are clock and reset domains shared, or is a crossing present and reviewed?SYSTEM INVARIANT
INT-05Is reset sequencing defined across the boundary?LOCAL POLICY
INT-06Does every endpoint observe every termination its counterpart asserts?SYSTEM INVARIANT
INT-07If a bridge converts terminations, what does it do with the ones it consumes?LOCAL POLICY
INT-08Can ownership change while a transfer is open?SPEC REQUIRED
INT-09What mechanism binds a response to its request, and what does it assume?SYSTEM INVARIANT
INT-10What answers an unmapped access, and does every master expect it?LOCAL POLICY
INT-11Are wait states tolerated by every master without bound?SPEC REQUIRED
INT-12Who owns the watchdog, and are all seven expiry questions answered?LOCAL POLICY
INT-13Is a late response after expiry absorbed?LOCAL POLICY
INT-14Are parameters consistent between instantiation and datasheet?REVIEW HYGIENE
INT-15Has the assembled system been exercised, not just the endpoints?REVIEW HYGIENE

7. What To Carry Forward

  • Two conformant endpoints can deadlock, and OBSERVATION 3.35 says so before you build it.
  • Fill the compatibility table honestly. NOT VERIFIED in a cell is information; a guess is not.
  • Profiles are timing contracts. Classic and pipelined need an adapter, not optimism.
  • Check the assumption, not the mechanism. Live-grant steering is fine when something prevents the grant from moving — and that something must be writable down.
  • A timeout threshold is a requirement, not a protocol constant, and expiry is the beginning of the policy rather than the end.

Chapter 30.5 is what you do when one of these items turns out to have been NOT VERIFIED.

Continue learning

Standards & specifications

Governing standard
Wishbone SoC Interconnection Architecture (OpenCores)(opens OpenCores in a new tab)

Defines the Wishbone signal set, the bus cycles built from it and the interface rules a portable IP core must follow. It deliberately leaves interconnect topology, address map and arbitration policy to the integrator, so those are system decisions rather than requirements of the specification.

This page also covers RTL structure, verification approach and debugging technique. Those are engineering practice built on the standard, not requirements the standard itself imposes.

Where this fits

Part of the Wishbone curriculum.