Why CHI Was Created

Module 3 · Chapter 3.8 · Why CHI Exists — module finale

Project thread — this chapter closes "Why CHI Exists" by turning every wall into a CHI design goal. Module 4 opens by building the CHI mental model: nodes, channels, packets.

1. Learning Outcomes

By the end of this chapter you should be able to:

• State CHI's core design goals — scalability, coherency, a layered packet protocol, QoS.
• Map each goal to the specific Module 3 wall it removes.
• Name the CHI node roles at a high level: Request Node (RN), Home Node (HN), Subordinate Node (SN).
• Sketch CHI's layered stack — Protocol, Network, Link — over a mesh fabric.
• Implement a representative address-to-Home-Node mapper in SystemVerilog, Verilog-2001, and VHDL.
• Explain why the Home Node is the single point of coherence for its addresses — and what breaks if that is inconsistent.

2. Why Should I Learn This?

This is the hinge of the whole track. Everything before it explained problems; everything after it explains CHI. This chapter connects the two: it shows that CHI is not an arbitrary pile of features but a set of deliberate answers, each traceable to a wall you have already seen. Learn the goal-to-wall mapping and CHI's later machinery — Home Nodes, channels, packet types, flow control — will feel motivated rather than memorized.

It also seeds the vocabulary. RN, HN, SN, layers, packets, directory: you meet them here as goals, then build them properly in Module 4. Starting Module 4 already knowing why each exists makes the how far easier.

3. Key Terms

4. Previous Chapter Connection

Every earlier chapter of this module contributed one constraint. Chapter 3.2: a shared bus serializes masters. Chapter 3.3: AXI moves data fast but is non-coherent. Chapter 3.4: ACE adds coherency by broadcast. Chapter 3.5: broadcast wastes snoops and cannot scale. Chapter 3.6: snoop demand is O(N²) against fixed bandwidth — the storm. Chapter 3.7: only a mesh NoC scales the medium.

This chapter reads that list backwards: for each wall, what must a new protocol do? Collect those answers and you have CHI's requirements. Rather than introduce CHI as a fait accompli, we derive its goals from the problems — the honest way to understand any architecture.

5. Core Concept — CHI's goals are answers to walls

CHI was designed to satisfy a small set of goals, each removing a specific wall.

• Scale to many cores. Replace broadcast with directory coherency (snoop only holders, O(1) not O(N)) and the shared medium with a mesh NoC (bandwidth grows with nodes). Removes the ACE broadcast wall and the snoop storm.
• Stay coherent in hardware. Provide a full coherence protocol with a rich transaction set — beyond AXI's non-coherence and broader than ACE. Removes AXI's coherency gap.
• Decouple coherence from transport. A layered protocol — Protocol, Network, Link — so the coherence logic does not depend on the wires. Lets CHI ride a mesh (or other fabric) and evolve independently. Removes the rigid protocol-topology coupling.
• Move messages as packets. Coherent transactions become packets with credited flow control, routed independently over the fabric. Removes shared-medium serialization.
• Serve mixed traffic well. Quality-of-service classes and deep outstanding transactions keep latency-sensitive traffic responsive under load.
• Give the system a clean node model. RN / HN / SN roles, with the directory sharded across distributed Home Nodes. Removes the central-bottleneck failure mode.

The one-sentence synthesis:

CHI is a layered, packet-based, directory-coherent protocol with a node model (RN/HN/SN) designed to run over a scalable mesh fabric — because that is exactly the combination that answers every wall Module 3 identified. Nothing in CHI is decorative; each choice pays off a specific debt.

6. Engineering Mental Model — a design brief, not a monument

Do not read CHI as a monument to admire feature by feature. Read it as the design brief an architect would write after living through Module 3:

• "Coherency must not broadcast." → directory.
• "The medium must scale." → mesh NoC.
• "Coherence must not be welded to the wires." → layers.
• "Messages must flow independently and never overrun a buffer." → packets with credits.
• "One place must be authoritative per address." → Home Node.
• "Urgent traffic must not drown." → QoS.

Read top to bottom, that brief is CHI. Every later chapter fills in one line of it. When a CHI detail seems arbitrary, trace it back to the brief line it satisfies — there always is one.

7. Engineering Diagram — the CHI node model

The Home Node in the middle is the whole idea: one authoritative place per address, holding the directory and serializing coherent access. Module 4 builds each of these roles in detail.

8. The CHI Layered Stack

CHI separates coherence from transport into layers, so the protocol can ride the mesh fabric of Chapter 3.7 without being welded to it.

9. Worked Example — every goal maps to a wall

Read CHI's goals as a ledger, each paying off a Module 3 debt.

There is no row without a wall. That is the point of the whole module: CHI is the union of these answers. Two facts to carry: the goals are not independent (directory needs a scalable medium; packets need layers), and every one is traceable to a concrete problem you have already felt.

10. Transaction Walkthrough — how a coherent read will work in CHI

A high-level preview (Module 4 makes it precise): CPU0 reads a shared line.

1. Request to the Home. RN-F (CPU0) sends a coherent read packet to the Home Node that owns the address — found by the system address map, not broadcast.
2. Directory lookup. The HN consults its directory: it knows exactly which caches hold the line — say, only CPU2.
3. Targeted snoop. The HN snoops only CPU2 (one message), not every cache. CPU2 returns the data.
4. Respond. The HN returns the data to CPU0 as a data packet and updates the directory to record CPU0 as a sharer.
5. Concurrency and QoS. All of this rides the mesh as independent packets with credited flow control; other traffic proceeds on other links, and QoS keeps urgent requests ahead of bulk transfers.

Every step is a CHI goal in action: Home Node, directory, targeted snoop, packets, QoS. No broadcast, no shared stall — the walls are gone.

11. RTL / Hardware View — address-to-Home-Node mapping

One goal has a crisp piece of hardware: finding which Home Node owns an address, so a request goes straight there instead of broadcasting. CHI interleaves addresses across Home Nodes for balance. Here is a representative mapper — simplified: a fixed hash, no full system-address-map programmability.

// Representative address-to-Home-Node mapper (educational, not a full SAM).
// Interleaves addresses across NUM_HN Home Nodes by hashing line-address bits,
// so directory load spreads. The mapping MUST be identical for every requester:
// the Home Node is the single point of coherence for its addresses.
module addr_to_hn #(
  parameter int NUM_HN = 4                     // Home Nodes (power of two)
)(
  input  logic [31:0] addr,
  output logic [1:0]  hn_id                     // target Home Node for this address
);
  // Hash line-address bits (64B lines -> ignore [5:0]); XOR-fold for spread.
  assign hn_id = addr[7:6] ^ addr[13:12];
endmodule

The same behavior in Verilog-2001:

// Representative address-to-Home-Node mapper (Verilog-2001).
module addr_to_hn #(
  parameter NUM_HN = 4
)(
  input  [31:0] addr,
  output [1:0]  hn_id
);
  assign hn_id = addr[7:6] ^ addr[13:12];
endmodule

And in VHDL:

-- Representative address-to-Home-Node mapper (VHDL).
library ieee;
use ieee.std_logic_1164.all;
 
entity addr_to_hn is
  generic ( NUM_HN : integer := 4 );
  port (
    addr  : in  std_logic_vector(31 downto 0);
    hn_id : out std_logic_vector(1 downto 0)
  );
end entity;
 
architecture rtl of addr_to_hn is
begin
  -- XOR-fold line-address bits to interleave across Home Nodes.
  hn_id <= (addr(7 downto 6)) xor (addr(13 downto 12));
end architecture;

All three are pure functions of the address: the same address always maps to the same Home Node. That determinism is not cosmetic — it is what guarantees a single point of coherence per line.

12. Verification View — one address, one Home Node

Two properties: the target is always a valid Home Node, and — the coherence-critical one — the mapping is a stable pure function of the address.

// Bind to addr_to_hn (NUM_HN = 4).
// 1. The target is always a valid Home Node index.
property p_valid_hn;
  @(*) hn_id < NUM_HN;
endproperty
 
// 2. Determinism: the same address maps to the same Home Node every time.
//    (Checked as a pure-function property — no state, so hn_id depends only on addr.)
property p_deterministic;
  @(posedge clk) (addr == $past(addr)) |-> (hn_id == $past(hn_id));
endproperty
assert property (p_deterministic);

The system point, beyond the two checks:

A Home Node is the single point of coherence for its addresses only if every requester agrees on which Home Node owns each address. The address-to-HN map must be identical and stable across the whole system. If two requesters compute different Home Nodes for the same line, two directories track it independently — a split brain — and coherence is silently broken. The determinism property looks trivial for one block; its real force is that the same map must be deployed everywhere.

• What it proves: the mapping is valid and deterministic for one mapper instance.
• What it does not prove: that all requesters share the same map — a system-integration property (the DebugLab).
• Bug signature: the same address reaching different Home Nodes from different requesters — coherence violations that depend on which requester wrote last.

13. Testbench — check the mapping is stable and valid

Applies addresses and confirms the Home Node is a valid index and repeatable.

module tb_addr_to_hn;
  localparam int NUM_HN = 4;
  logic [31:0] addr;
  logic [1:0]  hn_id, first;
  int errors = 0;
 
  addr_to_hn #(.NUM_HN(NUM_HN)) dut (.*);
 
  task automatic check(input logic [31:0] a, input string tag);
    addr = a; #1;
    if (hn_id >= NUM_HN) begin
      errors++; $display("FAIL [%s] hn_id=%0d out of range", tag, hn_id);
    end else
      $display("PASS [%s] addr=%h -> hn_id=%0d", tag, a, hn_id);
  endtask
 
  initial begin
    check(32'h0000_0040, "line 1");
    check(32'h0000_0080, "line 2");
    check(32'h0000_30C0, "folded bits differ");
    // Determinism: same address twice -> same Home Node.
    addr = 32'h0000_1040; #1; first = hn_id;
    addr = 32'h0000_1040; #1;
    if (hn_id !== first) begin errors++; $display("FAIL [determinism] %0d != %0d", hn_id, first); end
    else $display("PASS [determinism] stable hn_id=%0d", hn_id);
 
    if (errors == 0) $display("ALL TESTS PASSED");
    else             $display("%0d FAILURE(S)", errors);
    $finish;
  end
endmodule

Expected output:

PASS [line 1] addr=00000040 -> hn_id=1
PASS [line 2] addr=00000080 -> hn_id=2
PASS [folded bits differ] addr=000030c0 -> hn_id=0
PASS [determinism] stable hn_id=1
ALL TESTS PASSED

14. DebugLab — two requesters, two Home Nodes, one address

requester  addr         computed hn_id   note
  RN-A     0x0000_1040       1           uses hash addr[7:6]
  RN-B     0x0000_1040       3           uses hash addr[7:6]^addr[13:12]

15. Common Mistakes

• Reading CHI features as arbitrary. Assumption: a big protocol with many parts. Bug: memorizing without understanding. Prevention: map each feature to the wall it removes — the ledger in section 9.
• Thinking directory and NoC are independent choices. Assumption: pick one. Bug: a directory on a shared bus still bottlenecks; a NoC with broadcast still storms. Prevention: CHI needs both together.
• Treating layers as bureaucracy. Assumption: layering is overhead. Bug: coupling coherence to the wires. Prevention: layers let the protocol ride a mesh and evolve independently.
• Assuming any node can be the point of coherence. Assumption: coherence is distributed loosely. Bug: multiple authorities for one line. Prevention: the Home Node owns an address range; one address, one Home Node.
• Ignoring the system address map's consistency. Assumption: each block's mapping is enough. Bug: split coherence (the DebugLab). Prevention: one identical map system-wide.
• Expecting the full protocol here. Assumption: this chapter defines CHI. Bug: missing the detail in Module 4. Prevention: this is the goals and vocabulary; the mechanics come next.

16. Engineering Checklist

• For any CHI feature, name the wall it removes before accepting it.
• Treat directory + mesh NoC as a pair — coherence and topology must both scale.
• Keep coherence decoupled from transport via the layered stack.
• Route coherent access through the address's Home Node — never broadcast, never bypass.
• Deploy one system address map, identical and stable, across every agent.
• Read Module 4 knowing each mechanism satisfies a goal stated here.

17. Key Takeaways

• CHI is a layered, packet-based, directory-coherent protocol with an RN / HN / SN node model over a scalable mesh fabric.
• Every CHI goal answers a Module 3 wall: directory (broadcast/storm), mesh NoC (shared medium), layers (coupling), packets + credits (serialization), Home Node (central bottleneck), QoS (head-of-line blocking).
• The Home Node is the single point of coherence for its addresses, holding the directory; requesters reach memory through it.
• The address-to-Home-Node map must be identical and stable system-wide — a different map anywhere splits coherence.
• The goals are interdependent — directory needs a scalable medium, packets need layers — which is why CHI adopts them together.
• This is a representative overview; Module 4 builds the node, channel, and packet mechanics precisely.

18. Quick Revision

Why CHI was created. CHI's design goals each remove a Module 3 wall: directory coherency (snoop only holders — replaces ACE broadcast / snoop storm), a mesh NoC (bandwidth scales with nodes — replaces shared bus/ring), a layered protocol (Protocol / Network / Link — decouples coherence from transport), packets + credited flow control (independent messages — no shared-medium serialization), a node model RN / HN / SN with distributed Home Nodes (no central bottleneck), and QoS (mixed traffic). The Home Node is the single point of coherence for its addresses and holds their directory; the address-to-HN map must be identical system-wide or coherence splits. CHI is the union of these answers, run over a scalable fabric. Representative overview — Module 4 builds the mechanics.

Coming Next

Chapter 4.1 — The CHI Mental Model. Module 3 is complete: you know why CHI exists and what it aims to be. Module 4, CHI Architecture Overview, starts building it — beginning with the three abstractions everything else rests on: nodes (who talks), channels (the lanes they talk on), and packets (what they say). Get that mental model right, as the next chapter sets out to do, and the rest of CHI clicks into place.