Operator Usage in Verilog

Chapter 4 · Page 4.3 · Lexical Conventions

1. What an Operator Acts On

Look at an expression you have already seen:

a & b

Three pieces. & is the operator — the symbol that does something. a and b are its operands.

An operand is the value, signal or expression an operator works on.

Say it out loud with the parts named:

a       →  one operand
&       →  the operator
b       →  another operand

That is all "operand" means. A wire, a reg, a literal like 8'd5, a single bit like a[3], or the result of another expression — anything an operator can be handed.

And once you can see the operands, you can count them. That count is what this lesson is about.

2. Three Ways an Operator Can Be Used

Verilog operators are used in exactly three shapes:

• Unary — the operator acts on one operand.
• Binary — the operator acts on two operands.
• Ternary — the operator acts on three operands.

Nothing more is needed. Given any expression, find the operator, find what it is acting on, count — and you know which of the three you are looking at.

The next three sections take one example each.

3. Unary — One Operand

A unary operator acts on a single operand.

assign y = ~a;

Read the right-hand side carefully:

~       →  the operator
a       →  the one and only operand

There is nothing on the left of ~. It has exactly one thing to work on, so ~ is being used as a unary operator here.

What this describes in hardware. ~a inverts every bit of a and drives the result onto y. If a is a single bit, that is exactly an inverter: y is high when a is low, and low when a is high. If a is a vector, it is one inverter per bit, all in parallel.

4. Binary — Two Operands

A binary operator acts on two operands.

assign y = a & b;

Read it:

a       →  first operand
&       →  the operator
b       →  second operand

Two operands, one on each side. So & is being used as a binary operator here.

What this describes in hardware. For single-bit a and b, this is an AND gate: y is high only when both inputs are high. For vectors it is one AND gate per bit position.

Most operators you meet in Verilog are used this way — an operator sitting between the two values it combines. That shape is so common that it is easy to assume every operator has it, which is exactly why the unary and ternary cases are worth naming.

5. Ternary — Three Operands

A ternary operator acts on three operands. Verilog has one, and you have already used it — it is the multiplexer line from Chapter 3.

assign y = sel ? b : a;

The operator here is written in two pieces, ? and :, wrapped around the values. Between and around them sit three operands:

sel     →  first operand  — the condition
?                            (operator, part 1)
b       →  second operand — the value chosen when the condition is true
:                            (operator, part 2)
a       →  third operand  — the value chosen when the condition is false

Three operands take part, so this is a ternary use. Verilog's name for the operator itself is the conditional operator; because it is the only one that takes three operands, engineers usually just call it "the ternary."

What this describes in hardware. This is a 2:1 multiplexer. sel is the select line, a and b are the two data inputs, and y is the output. When sel is 1 the b input reaches y; when sel is 0 the a input does.

That is worth stating plainly, because the same syntax exists in software languages as a compact way to write an if:

In Verilog this is not shorthand for a decision made in time. It is a multiplexer — a real block of logic that sits on the chip and continuously steers one of two inputs to its output.

6. "Binary" Here Does Not Mean "Binary Numbers"

This one trips up nearly every beginner, so it is worth being blunt about.

When we call & a binary operator in a & b, binary means two operands. It has nothing to do with binary numbers, base 2, or 1'b0 and 1'b1.

The three words all come from the same counting idea:

• unary → one operand
• binary → two operands
• ternary → three operands

Under this naming, ~a is a unary operator applied to a binary number, and a + b is a binary operator applied to binary numbers. The word describes how many values take part, never what kind of values they are.

7. The Three Usage Forms at a Glance

8. Two Different Ways to Group Operators

Operators can be sorted in more than one way, and mixing the two systems up is a common source of confusion. Keep them separate.

By how many operands take part — the subject of this lesson:

• unary
• binary
• ternary

By what operation they actually perform — a different question entirely. Verilog's operators fall into ten families: arithmetic, logical, bitwise, reduction, relational, shift, equality, replication, concatenation and conditional. Those are taught in Verilog Operators and Operands — Chapter 10 — with one sub-page per family, and they are put to work building combinational hardware in Data-Flow Modeling, Chapter 13.

The two systems cut across each other, which is exactly why they are separate questions. & in a & b is binary by usage and bitwise by family. & in &a is unary by usage and reduction by family. ? : is ternary by usage and conditional by family.

Chapter 4.3 tells you the shape of an operator. Chapter 10 tells you what it computes.

You are in the lexical chapter, learning to read source text. Counting operands is a reading skill and you can use it today. What each family does to bits is a design skill, and it lands when you start writing combinational RTL.

9. An Operand Can Itself Be an Expression

So far every operand has been a plain signal. It does not have to be.

assign y = ~(a & b);

There are two operators on that line. Work from the inside out:

a & b         →  binary use of &     — two operands, a and b
~( ... )      →  unary use of ~      — ONE operand, which is
                                        the result of (a & b)

The operand of ~ is not a signal at all. It is a whole expression — the value produced by a & b. That is the idea worth taking away:

An operand can be a signal, a literal, or the result of another expression. Counting operands still works — you just count the expression as one operand.

What this describes in hardware. An AND gate feeding an inverter, which together is a NAND gate.

Notice the parentheses. They are what make the grouping unmistakable: ~ takes (a & b) as its operand, and nothing else. Verilog does have rules deciding what binds to what when you leave parentheses out, but you do not need to memorise them to write correct code. The useful beginner habit is simpler:

When an expression could be read more than one way, put in parentheses and say what you mean.

assign y = (a & b) | c;

The full precedence rules are covered in Operators Precedence, Chapter 10.1.

10. Exercises

Classify each one before reading the answers.

Exercise 1

~enable

How many operands, and what usage is that?

Exercise 2

a + b

How many operands, and what usage is that?

Exercise 3

sel ? x : y

How many operands, and what usage is that? Then: what hardware structure does this expression commonly describe?

Exercise 4

assign y = ~(a & b);

Name every operator on this line and the operand or operands each one acts on.

Answers

Exercise 1. One operand — enable. The ~ has a single value to work on, so this is a unary use.

Exercise 2. Two operands — a and b, with + between them. This is a binary use. (What + computes, and how wide the result is, belongs to Arithmetic Operator, Chapter 10.2. Here you only needed to count.)

Exercise 3. Three operands — sel as the condition, x as the value when the condition is true, y as the value when it is false. Three operands means a ternary use.

It commonly describes a 2:1 multiplexer: sel is the select line, x and y are the two data inputs, and the expression's result is the mux output.

Exercise 4. Two operators.

The & runs first because the parentheses group it, and its result becomes the single operand handed to ~. This is the point from §9: an operand does not have to be a signal — it can be the value another expression produced.

11. Summary

An operator works on operands. Count them, and you know the usage:

• one operand → unary, as in ~a
• two operands → binary, as in a & b
• three operands → ternary, as in sel ? b : a

Three things to carry forward:

• These words count operands. They do not describe the calculation — "binary operator" means two operands, never an operator for binary numbers.
• The same symbol can be used in more than one shape. & between two operands and & in front of one operand are different uses with different meanings, and the operand count is how you tell them apart.
• An operand can itself be an expression. In ~(a & b), the single operand of ~ is the result of a & b. When the grouping could be misread, parentheses settle it.

Next, Number Representation covers the literals that so often appear as operands — how a Verilog number carries its width, its base and its value.

Further out, in Verilog Operators and Operands you will study the ten Verilog operator families and what each one computes, and in Data-Flow Modeling you will use them to describe real combinational hardware.

Related Tutorials

• Lexical Conventions — Chapter 4 overview; the parent layer.
• White Space Requirements — Chapter 4.1; sibling.
• Comment Implementation — Chapter 4.2; sibling.
• Number Representation — Chapter 4.4; the literals that appear as operands.
• Verilog Operators and Operands — Chapter 10; the ten operator families and what each one computes.
• Data-Flow Modeling — Chapter 13; operators composed into real combinational RTL.
• RTL Designing — Chapter 3; where the mux expression in §5 came from.