DFT · Topic
Scan Chain Architecture — Scan Cells, Chains & Balancing
How scan converts a sequential design into something testable — scan flip-flops, chain construction, chain count and length balancing.
Scan solves a controllability and observability problem: a flip-flop deep inside a design cannot be set to a chosen value or observed directly from the pins. Stitching the flops into shift registers makes every one of them both. The costs are what the rest of this topic is about — area, an extra port, a timing path through the scan multiplexer, and a shift operation whose length sets the test time for the whole part.