DFT · Topic
JTAG & Boundary Scan — TAP Controller and IEEE 1149.1
The IEEE 1149.1 test access port — TAP state machine, instruction and data registers, boundary-scan cells and board-level test.
Boundary scan solves a board problem rather than a die problem: once packages have hundreds of pins and no physical probe access, the only way to test the connections between chips is from inside the chips. IEEE 1149.1 defines a four-wire port, a sixteen-state controller and a register at every pin, so a board can be told to drive and observe its own interconnect. It is also the access path most silicon bring-up starts from, which is why a TAP that does not respond is the first thing to check.