NONSEQ Transfers

This chapter covers NONSEQ, the transfer type that starts real activity on the bus. NONSEQ marks the first beat of a burst, or a standalone single transfer — any access whose address is non-sequential (unrelated to a previous transfer's pattern). It is one of the two "real transfer" types (with SEQ), and the distinction between them — NONSEQ starts, SEQ continues — is the backbone of burst structure. We cover what NONSEQ means, what "non-sequential" implies about the address, the common mistake of thinking a burst's first beat is SEQ, and how NONSEQ opens both bursts and single transfers. This builds on the overview (4.1) and the HTRANS encoding (3.3).

1. What Is It?

NONSEQ (HTRANS = 10) is a real transfer that starts. It marks one of two things:

• The first beat of a burst — the access that opens a burst, before any SEQ continuation beats.
• A single transfer — a standalone one-beat access (HBURST = SINGLE), which both starts and ends in one beat.

"Non-sequential" means the address is not required to follow any previous transfer's pattern — it is a fresh, arbitrary address. This is the contrast with SEQ, whose address must follow the burst pattern.

The essence: NONSEQ is the master announcing "a new access begins here." Whether it opens a multi-beat burst or is a lone single transfer, NONSEQ signals the start of real activity with a fresh address. The defining property is the address's freedom — a NONSEQ access can target any address, with no relationship to what came before, which is exactly what "non-sequential" captures.

2. Why Does It Exist?

NONSEQ exists because the bus needs to mark where a new access begins — distinct from a continuation of an existing burst — so the subordinate knows to start a fresh access rather than continue a pattern.

Consider what the subordinate needs to know. When a real transfer appears on the bus, the subordinate must determine: is this the start of something new, or the continuation of a burst it is already servicing? The two require different handling — a new access establishes a fresh address (and, if a burst, a new burst pattern to anticipate), while a continuation follows the established pattern. NONSEQ vs SEQ is exactly this distinction: NONSEQ says "new access, fresh address," SEQ says "continue the burst at the pattern address." So NONSEQ exists to mark the boundary where new activity begins, which the subordinate needs to correctly start servicing an access.

The "non-sequential" property — that the address is unrelated to any previous transfer — is what makes NONSEQ the right marker for a start. A new access can go anywhere; it is not constrained to follow a pattern. By contrast, a continuation (SEQ) is constrained — its address must follow the burst. So NONSEQ's freedom of address is intrinsic to its role: starting an access means presenting a fresh address, and NONSEQ is the type that carries that freedom. If the bus only had SEQ-style pattern-following transfers, it could never start a new access at an arbitrary address.

NONSEQ covering both burst-starts and single transfers is also deliberate. A single transfer is, in effect, a "burst" of one beat — it starts a real access at a fresh address, which is exactly NONSEQ's meaning. There is no need for a separate "single transfer" type; NONSEQ (with HBURST = SINGLE) covers it. So NONSEQ exists as the unified marker for "a real access starts here, at a fresh address," whether that access is one beat or the first of many. This economy — one type for all starts — keeps the transfer-type set small while covering every way real activity can begin.

3. Mental Model

Model NONSEQ as dialing a fresh phone number, versus staying on the same call (SEQ).

When you dial a new number (NONSEQ), you can call anyone — the number is unrelated to your previous call. That is a non-sequential access: a fresh address, no relationship to before. Once connected, if you continue the conversation in sequence, that is SEQ — but the act of dialing a new number is NONSEQ. Even a quick one-question call (a single transfer) starts with dialing a fresh number — NONSEQ. So every conversation begins with a NONSEQ "dial," whether it is a long call (a burst) or a brief one (a single transfer).

Watch NONSEQ opening both a single transfer and a burst:

The model's lesson: NONSEQ is dialing a fresh number — the start of a new access at an arbitrary address — whether a brief single transfer or the opening of a burst. The waveform shows both: a NONSEQ single transfer at A, and a NONSEQ burst-start at B followed by SEQ continuations. The fresh address is NONSEQ's signature.

4. Real Hardware Perspective

In hardware, NONSEQ tells a subordinate to start a fresh access, and (for a burst) to establish a new burst context from the accompanying control signals.

When a subordinate sees a committed NONSEQ (qualified by HSEL and HREADY — chapter 4.7), it starts a new access at the presented address. If the access is a burst (HBURST indicates a multi-beat type), the subordinate establishes its burst context: it notes the burst type and length, the beat size (HSIZE), and the starting address, and can begin anticipating the SEQ beats to come (prefetching, opening a memory row). So NONSEQ is the trigger for fresh access setup and new burst-context establishment — distinct from SEQ, which continues an already-established context.

The address on a NONSEQ is fresh — the subordinate must take it as given, with no assumption about its relationship to the previous access. This is why a subordinate decodes the address afresh on a NONSEQ (the decoder asserts the HSEL of whichever subordinate the new address selects). A burst-start NONSEQ may select a different subordinate than the previous burst targeted, because its address is unrelated. So NONSEQ is also where subordinate selection can change — a new access can go anywhere, including to a different subordinate.

For a single transfer (NONSEQ with HBURST = SINGLE), the hardware behaviour is the simplest case: the subordinate performs one access and there are no SEQ continuations — the access starts and ends in one beat. So NONSEQ-SINGLE is the degenerate burst, and a subordinate handles it as a one-beat access with no burst context to maintain beyond the single beat. The vast majority of incidental accesses (register pokes, isolated reads) are NONSEQ-SINGLE.

The key hardware contrast with SEQ, developed fully in the next chapter, is that NONSEQ does not require the address to follow a pattern — it can be arbitrary — whereas SEQ's address must follow the burst pattern. So a subordinate's address handling differs: on NONSEQ it takes the fresh address; on SEQ it expects (and the master must supply) the pattern-following address. Getting this right is part of correct burst handling.

5. System Architecture Perspective

At the system level, NONSEQ marks the boundaries between distinct operations, which matters for both performance accounting and burst optimization.

Every distinct operation a master performs — each single transfer, each burst — begins with a NONSEQ. So the NONSEQ cycles on the bus are the boundaries between operations: counting them tells you how many distinct accesses/bursts a master is performing, and the pattern of NONSEQ-then-SEQ reveals burst structure. For performance accounting, a system might track NONSEQ frequency to understand whether a master is doing many small single transfers (lots of NONSEQ, inefficient) or fewer long bursts (NONSEQ followed by many SEQ, efficient). So NONSEQ is the marker by which the system's operation granularity is visible on the bus.

NONSEQ also triggers the memory subsystem's burst setup. When a memory controller sees a NONSEQ that opens a burst, it uses the accompanying HBURST and HSIZE to anticipate the whole burst — this is where the burst optimization (prefetch, row management) is established. So NONSEQ is the cue for the memory to prepare for an efficient burst. A master that issued many NONSEQ-SINGLE transfers instead of bursts would deny the memory this setup opportunity on each access, hurting efficiency — which is why bulk movers use bursts (one NONSEQ, many SEQ) rather than streams of single transfers (all NONSEQ).

The subordinate-can-change property has a system implication too: because a NONSEQ can target any address (including a different subordinate), NONSEQ is where the interconnect re-evaluates routing. The system's address decode runs fresh on each NONSEQ; a sequence of NONSEQ accesses to different regions exercises the decoder repeatedly, while a burst (NONSEQ then SEQ) stays within one region. So NONSEQ frequency and address spread reflect how a master's traffic ranges across the address map — useful for understanding access patterns and interconnect load.

So at the system level, NONSEQ marks operation boundaries (visible granularity), triggers memory burst setup (performance), and is where routing re-evaluates (the access can go anywhere). It is the bus's "new operation starts here" marker, and its frequency and pattern reveal much about a master's behaviour.

6. Engineering Tradeoffs

NONSEQ's design reflects choices about marking the start of access.

• One type for burst-starts and single transfers. Using NONSEQ for both (a single transfer is a one-beat burst-start) keeps the type set small and uniform, at the cost of needing HBURST to distinguish single from burst. The alternative — separate types — would bloat the encoding. The unified NONSEQ is the cleaner design.
• Fresh address (NONSEQ) vs always-pattern. Allowing NONSEQ to present an arbitrary address gives masters full freedom to access anywhere, which is essential (you must be able to start a new access at any location). The cost is that the subordinate must decode the address fresh on each NONSEQ. This is exactly right — starting an access inherently means presenting a new address.
• NONSEQ-SINGLE vs requiring bursts. Allowing single transfers (NONSEQ-SINGLE) supports incidental one-off accesses cheaply, at the cost of less efficiency than bursts for bulk data. The system uses NONSEQ-SINGLE for incidental accesses and bursts (NONSEQ + SEQ) for bulk — matching the construct to the traffic (chapter 2.6). The flexibility to do both is the right trade.
• Explicit start marker (NONSEQ) vs inferred. Marking the start explicitly (NONSEQ distinct from SEQ) lets the subordinate cleanly distinguish new accesses from continuations, at the cost of the two-type distinction. Inferring "new vs continuation" from address changes would be ambiguous (an address jump might be a new access or a wrap). The explicit NONSEQ/SEQ distinction is unambiguous and worth it.

The throughline: NONSEQ is the explicit, unified marker for "a real access starts here at a fresh address" — covering both bursts and single transfers, with the address freedom that starting an access requires. Its tradeoffs all favour a clean, unambiguous start marker, consistent with the transfer-type system's design.

7. Industry Example

Trace NONSEQ across a master's mixed traffic.

A processor performs a few incidental accesses and a cache-line fill.

• A register write (NONSEQ-SINGLE). The processor writes a peripheral control register. This is a single transfer: NONSEQ at the register's fresh address, HBURST = SINGLE, complete in one beat. No SEQ follows. The decoder selects the peripheral from the fresh address. This is the common incidental-access case.
• An isolated data read (NONSEQ-SINGLE). The processor reads a single word from memory — again NONSEQ at a fresh address, SINGLE, one beat. Note the address is unrelated to the previous register write — non-sequential, a new access.
• A cache-line fill (NONSEQ then SEQ). The processor's cache fills a line: NONSEQ at the (fresh) line address opens the burst, and the memory, seeing NONSEQ with the burst type (say WRAP), establishes its burst context. The continuation beats are SEQ at the pattern addresses. Only the first beat is NONSEQ; the rest are SEQ.
• Operation boundaries on the bus. Reading the HTRANS track, each NONSEQ marks a new operation: NONSEQ (register write), NONSEQ (data read), NONSEQ-then-SEQ… (cache fill). The NONSEQ cycles are the boundaries between distinct operations, and the NONSEQ-then-SEQ pattern of the cache fill is visibly a burst, while the lone NONSEQs are single transfers.
• The efficiency contrast. If the processor had read the whole cache line as eight separate single transfers, the bus would show eight NONSEQ accesses — eight fresh starts, no burst, the memory unable to anticipate. As a burst (one NONSEQ, seven SEQ), the memory sets up once and streams efficiently. The difference is visible in the NONSEQ-vs-SEQ pattern, and it is why bursts use one NONSEQ to open and SEQ to continue.

The traffic shows NONSEQ's role: it opens every operation, whether a single transfer or a burst, always at a fresh address, and its pattern (lone NONSEQ vs NONSEQ-then-SEQ) reveals single transfers versus bursts.

8. Common Mistakes

9. Interview Insight

NONSEQ questions test the burst-start understanding and the "first beat is NONSEQ" rule.

The answer that lands gives NONSEQ's meaning and the first-beat rule: "NONSEQ is a real transfer that starts — either the first beat of a burst or a single transfer. 'Non-sequential' means its address is fresh, with no required relationship to the previous transfer. The key point is that a burst's first beat is always NONSEQ — only the continuation beats are SEQ — and a single transfer is also NONSEQ (with HBURST = SINGLE). So every new access begins with NONSEQ at a fresh address." The first-beat-is-NONSEQ rule and the single-transfer-is-NONSEQ point are the senior signals.

10. Practice Challenge

Reason from the start-marker role and the first-beat rule.

1. Define NONSEQ. State the two things NONSEQ marks and what "non-sequential" means.
2. First beat. State whether a burst's first beat is NONSEQ or SEQ, and what the rest are.
3. Read the waveform. From Figure 2, identify the single transfer, the burst-start, and the continuation beats by transfer type.
4. Address freedom. Explain why a NONSEQ can target a different subordinate but a SEQ cannot.
5. Spot the inefficiency. A master reads a line as 8 single transfers. Describe the HTRANS pattern and why it is inefficient versus a burst.

11. Key Takeaways

• NONSEQ (10) is a real transfer that starts — the first beat of a burst or a single transfer — at a fresh, non-sequential address.
• A burst's first beat is always NONSEQ; only continuation beats are SEQ. "First beat is SEQ" is the classic error.
• A single transfer is NONSEQ (with HBURST = SINGLE) — a one-beat access; no separate type is needed.
• "Non-sequential" means the address is fresh/arbitrary — no required relationship to the previous transfer, which is the contrast with SEQ's pattern-following address.
• NONSEQ is where the subordinate can change — its fresh address may select a different subordinate; the bus re-evaluates routing on each NONSEQ.
• NONSEQ marks operation boundaries and triggers memory burst setup — its frequency and the NONSEQ-vs-SEQ pattern reveal single transfers versus efficient bursts.

12. What Comes Next

You now know how real activity starts. The next chapter covers how a burst continues:

• 4.5 — SEQ Transfers (coming next) — the continuation beats of a burst, the pattern-address rule, and what stays constant across a burst.
• 4.6 — How HTRANS Controls Bus Activity (coming soon) — tying the transfer types to whether the bus and subordinate actually do work each cycle.

To revisit the type system and the burst structure NONSEQ opens, see Transfer Types Overview and Single Transfer vs Burst Transfer; for the encoding and the addresses involved, see HTRANS and HADDR & HWRITE. For the broader protocol map, see the AMBA family overview.