Working Example: Scan Reset & X Issues

Chapter 11 · Section 11.5 · Scan / DFT Interaction

Project thread — the mini-SoC's scan test must come up in a known state. This capstone closes the DFT chapter; Chapter 12 generalizes everything into a repeatable GLS debug methodology (first-divergence, waveform debug, RTL-vs-GLS).

1. Why Should I Learn This?

A scan chain full of X makes every pattern fail — and it's a specific, common DFT bug.

• Scan flops must come up known (reset/initialized) before shifting.
• Test-mode reset differs from functional — it may not apply as you expect.
• X sources (non-scan flops, memories, black boxes) must be bounded.

It integrates 11.1–11.4 on one bug and closes the chapter.

2. Real Silicon Story — every pattern failed

A scan test had every pattern mismatch — a catastrophic, uniform failure that first looked like a tester or pattern-set problem.

The cause was in the netlist: the scan flops were never reset in test mode (the functional reset wasn't applied the way scan needed), so the chain came up X, and shifting X made every captured response unknown → every pattern mismatched (11.4). Compounding it, a non-scan flop and an uninitialized memory kept injecting X into the logic. Resetting the scan flops to a known state before shift (and bounding the X sources) cleared the whole failure.

Lesson: if the scan chain isn't reset/initialized to a known state before shifting, X fills it and every pattern fails. Test-mode reset differs from functional, and X sources must be bounded.

3. Concept — scan reset and X, root-caused

Why the chain fills with X:

• Scan flops (like all flops) power up X (2.6); only reset/initialization clears them.
• If test-mode reset isn't applied, the chain starts X, and shifting X propagates it through every flop → every pattern mismatches (11.4).

Test-mode reset differs (DFT twist):

• In test mode, reset is often controlled differently: a scan-controllable reset, a reset held to a known value, or a dedicated test reset.
• The functional reset you rely on may not apply during scan the way you expect — so scan flops can start X even though functional reset 'works'.

X sources must be bounded (DFT twist):

• Non-scan flops (no scan path, 11.2) — uninitialized → X into the logic.
• Uninitialized memories — contents X → X into the response.
• Black boxes (unmodelled blocks) — outputs X.
• These must be bounded: initialized (reset/preloaded) or X-masked/handled by ATPG so they don't corrupt the chain/response.

Applying the chapter:

• 11.1 — this is a test-mode run (SE), distinct from functional; the mismatch is a simulation issue, not coverage.
• 11.2 — the chain must be intact and all scan flops known.
• 11.3 — shifting X through the chain corrupts the shifted response.
• 11.4 — every pattern mismatches because the chain (the shift register) is X; debug by first divergence (here, it's all of it → chain-level X).

The fix:

• Reset/initialize all scan flops to a known state before shift (via the correct test-mode reset).
• Bound the X sources (initialize non-scan flops/memories, model or mask black boxes).

Scope (accuracy):

• Test-mode reset and X-bounding are DFT/functional correctness; coverage is ATPG's (11.1). GLS stays dynamic; STA signs off timing (0.3).

4. Mental Model — a relay of blank batons

The scan chain is the bucket brigade of 11.2 — but at power-up everyone is holding a blank (unknown) baton (X).

• If you never call 'reset' (test-mode reset), everyone keeps their blank baton, and passing blanks down the line (shifting X) means the end (scan-out) always gets a blank → every test fails.
• Calling 'reset' (correct test-mode reset) hands everyone a known baton (0) first — now passing real batons works.
• And you must stop outsiders throwing blanks into the line — a non-brigade member (non-scan flop), an empty warehouse (uninitialized memory), a stranger (black box) tossing blank batons in must be bounded (given real batons, or kept out).

Call reset first (known chain), keep blank-baton-throwers out (bound X sources).

5. Working Example — the chain X, and the fix

The missing test-mode reset and the fix (representative):

// THE BUG: functional reset not applied in test mode -> scan flops start X -> chain = X
// (e.g. reset gated off, or a test-reset pin not driven)
SDFFR u_f0 (.D(d0), .SI(scan_in), .SE(se), .CK(clk), .RN(rst_n), .Q(q0));  // RN not asserted in test -> X
 
// THE FIX: assert the correct TEST-MODE reset to initialize ALL scan flops before shift
// + bound X sources:
//   - non-scan flops: initialize/reset (or make them scan flops, 11.2)
//   - memories: preload/initialize contents (else X)
//   - black boxes: provide a sim model or X-mask outputs (ATPG)

# Root-cause a chain full of X (applying the chapter, tool-neutral):
#   11.1: test-mode run (SE) -- a mismatch is a SIMULATION issue, not coverage
#   11.2: is the chain intact AND are all scan flops known? (X = not initialized)
#   11.3: shifting X corrupts the shifted response
#   11.4: EVERY pattern mismatches -> chain-level X (the shift register itself is X)
#   fix:  correct TEST-MODE reset before shift + BOUND X sources (init/mask)

Practical context (representative, tool-neutral):

gls/
  netlist/soc.vg        # scan netlist
  patterns/atpg.stil    # patterns + expected + test-mode reset/init procedure
  tb/tb_scan.v          # drives TEST-MODE reset before shift; bounds X sources
# Symptom: EVERY pattern mismatches -> chain full of X
# Check:  test-mode reset applied? all scan flops known before shift? X sources bounded?
# Fix:    correct test-mode reset + init/mask non-scan flops, memories, black boxes

The chain full of X, then reset to a known state, as a real waveform:

6. Debugging Session — every scan pattern fails

7. Common Mistakes

• Assuming functional reset applies in test mode. Test-mode reset differs — it may not.
• Not initializing the chain before shift. An X chain fails every pattern.
• Leaving X sources unbounded. Non-scan flops, memories, black boxes inject X.
• Blaming the tester/patterns for a uniform failure. All-patterns-fail = chain-level X.
• Treating the mismatch as coverage. It's a simulation/init issue (11.1).

8. Industry Best Practices

• Reset/initialize all scan flops to a known state before shift (correct test-mode reset).
• Verify test-mode reset applies (it differs from functional).
• Bound X sources — init non-scan flops/memories, model/mask black boxes.
• Read a uniform (all-patterns) failure as chain-level X.
• Verify a known chain in GLS before the tester.

Senior Engineer Thinking

• Beginner: "Every pattern fails — the tester or the pattern set is broken."
• Senior: "All patterns failing means the chain is X — was test-mode reset applied before shift? It differs from functional. And are the X sources (non-scan flops, memories, black boxes) bounded? Reset the chain, bound the X, re-run."

The senior reads a uniform failure as chain-level X, checks test-mode reset, and bounds X sources.

Silicon Impact

Scan reset/X issues are catastrophic-but-fixable DFT bugs: a scan chain that comes up X makes every pattern fail, rendering the design untestable — an all-or-nothing failure that, if it reached the tester, would block manufacturing test entirely (0.3). The two DFT twists are the crux: test-mode reset differs from functional (so the reset you trust may not apply during scan), and X sources must be bounded (non-scan flops, memories, black boxes inject X that ATPG must mask or the design must initialize). Pattern GLS is exactly where a chain-level X is caught before tape-out — a uniform mismatch is the unmistakable signature. This capstone unites the chapter (intersection, chain, shift/capture, mismatch) with reset (Ch7) and X-propagation (Ch6): getting the scan chain to a known state with bounded X is what makes the manufacturing test viable at all.

Engineering Checklist

• Reset/initialized all scan flops to a known state before shift (test-mode reset).
• Verified test-mode reset applies (differs from functional).
• Bounded X sources (non-scan flops, memories, black boxes).
• Read a uniform (all-patterns) failure as chain-level X.
• Verified a known chain and matching patterns in GLS before the tester.

Try Yourself

1. Run pattern GLS without asserting a test-mode reset — the scan chain is X and every pattern mismatches.
2. Observe: the uniform failure = chain-level X (not a per-pattern fault).
3. Change: assert the correct test-mode reset before shift, and initialize a non-scan flop / memory feeding the logic.
4. Expect: the chain comes up known, X sources are bounded, and patterns match. Prove that reset + X-bounding, not the patterns, was the fix.

Any free Verilog simulator reproduces a chain-level X and its reset/init fix; ATPG X-masking is an EDA-tool feature. No paid tool required for the concept.

Interview Perspective

• Weak: "Every scan pattern fails, so the patterns are wrong."
• Good: "A chain full of X fails every pattern — the scan flops weren't reset to a known state before shift."
• Senior: "All-patterns-fail is chain-level X. Test-mode reset differs from functional, so the reset I rely on may not apply during scan — I assert the correct test-mode reset to initialize the chain before shift, and I bound X sources (non-scan flops, memories, black boxes) by initializing or X-masking them. Pattern GLS catches this before the tester; it's a simulation/init issue, not coverage."

9. Interview / Review Questions

10. Key Takeaways

• A scan chain must be reset/initialized to a known state before shifting — scan flops power up X (2.6), and if the chain starts X, shifting X makes every pattern mismatch (11.4).
• Test-mode reset differs from functional — it may be a scan-controllable reset or a test reset, so the functional reset you rely on may not apply during scan (the root cause here).
• X sources must be bounded: non-scan flops (11.2), uninitialized memories, and black boxes inject X — initialize them or X-mask/handle them in ATPG.
• A uniform, all-patterns failure is the signature of a chain-level X — not a per-pattern fault or a tester/pattern bug.
• This unites the chapter (intersection 11.1, chain 11.2, shift/capture 11.3, mismatch 11.4) with reset (Ch7) and X-propagation (Ch6); pattern GLS verifies simulation, not coverage (11.1); GLS stays dynamic, STA signs off timing (0.3). This closes Chapter 11; next, Chapter 12 builds a repeatable GLS debug methodology.

Quick Revision

Scan chain must be reset/initialized to a KNOWN state before shift. Scan flops power up X (2.6); if the chain starts X, shifting X → EVERY pattern mismatches (11.4). Test-mode reset DIFFERS from functional (scan-controllable/test reset — may not apply). Bound X sources: non-scan flops (11.2), memories, black boxes → init or X-mask. All-patterns-fail = chain-level X. Unites Ch11 + reset (Ch7) + X-prop (Ch6). Chapter 11 complete; next: Chapter 12 — GLS debug methodology.