AMBA AXI · Module 18
Tricky AXI Misconceptions
The AXI myths candidates confidently repeat — VALID waits for READY, different-ID responses must be ordered, a clean protocol checker means verified, longer bursts are always better — and the correct understanding of each, so you never end an interview on a wrong-but-confident answer.
The most dangerous interview answer isn't "I don't know" — it's a confident wrong answer. Across the AXI curriculum, certain misconceptions recur so often that they've become traps: candidates state them fluently, the interviewer hears a fundamental misunderstanding, and the interview ends. This final interview chapter collects the highest-impact AXI myths — the ones that, stated confidently, signal a shallow grasp — and the precise correct understanding of each. Many you've met in the per-chapter "misconceptions" callouts; here they're gathered as a checklist of what not to say and what to say instead. The goal: never lose an interview (or a design review) to a wrong-but-confident claim about something you actually understand.
1. Why Confident Wrong Beats Honest Uncertain — Badly
An interviewer weighs a confident wrong answer far more negatively than "I'm not sure." A wrong fact stated fluently signals you don't know what you don't know — that your other confident claims may also be wrong — which undermines everything. "I'm not sure, but I'd reason it as..." signals calibration and honesty. So the worst outcome isn't a gap; it's a myth delivered with conviction. This chapter's myths are exactly the ones candidates deliver confidently, which is what makes them lethal — and why knowing the correction precisely matters more than for an obscure fact.
2. The Handshake Myths
The most lethal myths are about the handshake, because it's the most-probed topic. Myth: "VALID waits for READY." — Wrong, and the single most dangerous AXI myth: READY may depend on VALID, but VALID must never depend combinationally on READY (or you deadlock). Myth: "the handshake is symmetric." — No, the asymmetry is the rule. Myth: "once VALID is high you can change the payload." — No, the payload must stay stable until the handshake completes. Myth: "a beat transfers when VALID goes high." — No, only when both VALID and READY are high on a rising edge. Stating any of these myths confidently ends a handshake discussion immediately.
Handshake myth vs. reality
7 cycles3. The Ordering and ID Myths
Ordering myths are the next most common. Myth: "all responses must come back in order." — Wrong: only same-ID responses are ordered; different IDs may complete in any order (that's the point of IDs). Myth: "IDs are just labels." — They're the mechanism that enables out-of-order completion. Myth: "an ID mismatch causes an error response." — No, it's silent (right data, wrong transaction); there's no error code for a wrong ID. Myth: "writes get a response per beat." — No, writes get one aggregated B per burst; reads get a per-beat RRESP. Confusing these signals you don't understand the transaction model.
4. The Verification and Performance Myths
The remaining high-impact myths span verification and performance. Myth: "a clean protocol checker means it's verified." — No: that's compliance, not correctness — a compliant slave can return wrong data; you need a scoreboard. Myth: "100% coverage means bug-free." — Coverage measures exercise, not correctness, and only of what you defined. Myth: "high latency means low throughput." — Decoupled: outstanding transactions hide latency. Myth: "longer bursts are always better." — They amortize overhead but the 4 KB rule caps span and very long bursts hurt fairness. Myth: "exclusive access locks the bus." — No, that's locked access; exclusive is non-locking. Myth: "the 4 KB rule is arbitrary." — It's the minimum page size. Each correction is a one-liner that signals real understanding.
5. Common Misconceptions
6. Debugging Insight
7. Verification Insight
8. Interview Questions
9. Summary
The most dangerous interview answer is a confident wrong one — it signals you don't know what you don't know, undermining trust in everything else, which is worse than an honest "I'm not sure, but I'd reason it as...". The highest-impact AXI myths cluster on a few topics: the handshake ("VALID waits for READY" — wrong; the asymmetry is the rule, VALID must never depend on READY, deadlock otherwise; payload stays stable; a beat is VALID && READY, not VALID alone); ordering/IDs ("all responses ordered" — only same-ID; "IDs are just labels" — they enable out-of-order; "ID mismatch errors" — it's silent; "writes get per-beat responses" — one aggregated B, reads are per-beat); and verification/performance ("clean checker = verified" — compliance not correctness; "100% coverage = bug-free" — exercise not correctness; "high latency = low throughput" — decoupled by outstanding; "longer bursts always better" — 4 KB cap + fairness; "exclusive locks the bus" — that's locked, exclusive is non-locking; "4 KB rule is arbitrary" — minimum page size).
These myths cluster precisely where AXI involves a non-obvious distinction, deliberate asymmetry, or qualified rule that contradicts intuition — so they map exactly where understanding is genuinely hard, and avoiding them requires grasping the reasoning (deadlock → asymmetry, dependencies → same-ID ordering, legal-vs-right → compliance-vs-correctness, latency-hiding → decoupling), not memorizing phrases. The disciplines: know the corrections cold (with the critical qualifier attached reflexively), and prefer calibrated reasoning over confident guessing (reason aloud from a known principle when uncertain — it's honest and productive, and often reaches the right answer). This completes Module 18 (Interview Mastery) — from articulating fundamentals to reasoning through trade-offs to avoiding the myths, the skill throughout is communicating genuine AXI understanding clearly and correctly, which is the test the myths concentrate. Next, Module 19 applies everything to real industry case studies.
10. What Comes Next
You can now avoid the confident-wrong traps; next, AXI in real systems:
- 19.1 — CPU-to-Memory Path (coming next) — tracing a CPU load/store through AXI to memory, the first industry case study applying the whole curriculum to a real system.
Previous: 18.6 — Verification Interview Questions. Related: 3.5 — Handshake Dependency & Deadlock Rules for the handshake-asymmetry myth, 8.4 — Different-ID Ordering for the ordering myth, and 9.3 — Exclusive Access for the exclusive-vs-locked myth.