AMBA AXI · Module 18

Intermediate AXI Interview Questions

The intermediate AXI questions that separate competent from strong candidates — bursts (types, length, size, the 4 KB rule), transaction IDs and what they enable, ordering rules (same-ID vs. different-ID), WSTRB, and outstanding transactions — with the precise-core-plus-why answers and the connections interviewers want you to draw.

The beginner round (18.1) confirmed you know the fundamentals; the intermediate round tests whether you understand the mechanisms that make AXI high-performance — bursts, IDs, ordering, byte strobes, and outstanding transactions — and, crucially, how they connect. Intermediate questions are rarely standalone definitions; interviewers probe the relationships ("how do IDs enable out-of-order completion?", "why does the 4 KB rule exist?") because that's where understanding shows. The same answer discipline from 18.1 applies — precise core, then the why — but now the why often links two concepts, and the strongest answers draw the connection the interviewer is fishing for. This chapter covers the intermediate question set and the connections that distinguish a competent candidate from a strong one.

1. What Intermediate Questions Add: Connections

Where beginner questions test isolated facts, intermediate questions test how mechanisms relate. The interviewer wants to see you connect: IDs ↔ out-of-order completion, decoupled address/data ↔ outstanding transactions, burst SIZE/LEN ↔ the 4 KB rule, WSTRB ↔ partial writes. A strong intermediate answer doesn't just define the concept — it names what it enables or what constrains it, showing you understand AXI as a system of interacting mechanisms, not a list of features.

Figure 1 — intermediate questions test connections between mechanisms, not isolated facts. The interviewer probes relationships: IDs enable out-of-order completion; decoupled address/data enables outstanding transactions; SIZE/LEN interact with the 4 KB rule; WSTRB enables partial writes. A strong answer names what a concept enables or what constrains it, demonstrating an understanding of AXI as interacting mechanisms rather than a feature list.

2. Bursts: Types, LEN, SIZE, and the 4 KB Rule

The burst question set is core to the intermediate round. "What are the burst types?" — FIXED (same address every beat, for a peripheral FIFO), INCR (address increments, the common case), WRAP (wraps within an aligned region, for cache-line fills). "What do AxLEN/AxSIZE mean?" — LEN = beats minus one; SIZE = log2(bytes per beat); together the span is (LEN+1) << SIZE. "What's the 4 KB rule and why?" — a burst must not cross a 4 KB boundary, because 4 KB is the minimum page size, so a burst stays within one page and thus one slave/one set of memory attributes — the connection (SIZE/LEN determine the span, which the rule constrains) is what the interviewer wants.

Figure 2 — the burst question set. Types: FIXED (same address, peripheral FIFO), INCR (incrementing, common), WRAP (wraps in an aligned region, cache-line fills). AxLEN = beats−1, AxSIZE = log2(bytes/beat), span = (LEN+1) << SIZE. The 4 KB rule: a burst must not cross a 4 KB boundary, because 4 KB is the minimum page size, so a burst stays within one page (one slave, one set of attributes). The connection — span constrained by the rule — is the answer interviewers probe.

3. IDs and Ordering: The Connection They Probe Hardest

The ID/ordering pair is the intermediate round's signature probe, because it's where the connection is the answer. "What are transaction IDs for?" — they tag transactions so responses can be matched to requests, which enables multiple outstanding and out-of-order completion. "What are the ordering rules?" — responses for the same ID must return in request order; different IDs may complete in any order. The connection the interviewer wants: IDs are precisely the mechanism that makes out-of-order completion possible — same-ID stays ordered (so a producer/consumer dependency is preserved), different-ID is free (so independent transactions don't block each other). Stating the rule and why it's structured that way (ordering where needed, freedom where not) is the strong answer.

Different-ID out-of-order, same-ID in-order

9 cycles

Figure 3 — IDs and ordering on the wire (the signature intermediate probe). Two reads with different IDs are issued; their responses return out of order (ID=2 before ID=1) — legal, because different IDs may complete in any order. Two same-ID reads, by contrast, must return in issue order. The connection: IDs enable out-of-order completion (independent transactions don't block each other) while same-ID ordering preserves dependencies. The rule plus its rationale is the answer that distinguishes a strong candidate.

4. WSTRB and Outstanding: The Remaining Pair

Two more intermediate staples. "What is WSTRB?" — a per-byte write-enable (one bit per data byte); a set bit writes that byte, a clear bit preserves it — enabling partial-word and byte-granular writes (a register field, a sub-word store). The connection: WSTRB is why a write can update some bytes without read-modify-write. "What are outstanding transactions?" — transactions issued but not yet completed; AXI allows multiple in flight (via the decoupled address/data and IDs), which is what hides latency and sustains throughput. The connection the interviewer wants: outstanding capability comes from address/data decoupling plus IDs, and delivers latency tolerance — tying back to "why AXI is high-performance."

Figure 4 — WSTRB and outstanding transactions, with their connections. WSTRB is a per-byte write-enable enabling partial-word writes without read-modify-write. Outstanding transactions (multiple in flight, enabled by address/data decoupling and IDs) hide latency and sustain throughput. Both answers should name the connection: WSTRB → partial writes; outstanding → from decoupling+IDs, delivering latency tolerance — which ties back to why AXI is high-performance.

5. Common Misconceptions

Myths to unlearn

"Intermediate questions are just harder definitions." They test connections, not isolated facts — "how do IDs enable out-of-order completion?" not "what is an ID?". A definition-only answer misses what the interviewer is probing; name what the concept enables or constrains.
"The 4 KB rule is an arbitrary limit." It's tied to the minimum page size: a burst must stay within a 4 KB page so it maps to one slave and one set of memory attributes, avoiding a single burst spanning two pages/regions. Stating the reason (page-bounded) is the strong answer.
"Different-ID responses must come back in order." No — same-ID responses must be in order; different-ID may complete in any order. This is the most-tested ordering detail, and getting it backwards signals you don't understand what IDs are for.
"IDs are just labels." IDs are the mechanism that enables out-of-order completion — they let the system reorder independent (different-ID) transactions while preserving order within a dependency (same-ID). Calling them "just labels" misses the connection that's the whole point of the question.
"WSTRB is an edge case." Partial-word writes (register fields, sub-word stores) are common, and WSTRB is what makes them possible without read-modify-write. It's a core mechanism, and the connection (WSTRB → partial writes) is what to state.
"Outstanding transactions are a niche optimization." They're central to AXI's performance — multiple in-flight transactions are what hide latency, and they come from the address/data decoupling plus IDs. Connecting outstanding → latency-tolerance → "why AXI is fast" is exactly the synthesis interviewers reward.

6. Debugging Insight

🔍 Debugging insight — the intermediate answer fails when you miss the connection

Diagnose a weak intermediate answer by the connection it missed:

Defined the concept but not what it enables. The core intermediate failure — "an ID is a tag" without "...which enables out-of-order completion." Fix: for each mechanism, rehearse what it enables (ID → reordering; decoupling → outstanding; WSTRB → partial writes), and lead the answer toward the connection.
Got the ordering rule backwards. "Different IDs must be in order" — wrong and revealing. Fix: anchor on same-ID-ordered / different-ID-free, and tie it to the why (preserve dependencies, free independent transactions).
Stated the 4 KB rule without the reason. "Can't cross 4 KB" without "because 4 KB is the min page size, so a burst stays in one page/slave." Fix: always pair the rule with the page-size rationale.
Couldn't compute a burst span. "How many bytes does an AWLEN=7, AWSIZE=2 burst move?" → (7+1) × 4 = 32 bytes. Fix: know span = (LEN+1) << SIZE cold and be ready to apply it.
Treated mechanisms in isolation. Missed that outstanding comes from decoupling+IDs and delivers latency tolerance. Fix: practice the synthesis chains (decouple → outstanding → latency-hiding → throughput) so you can connect on demand.
Confused burst types' use cases. WRAP is for cache-line fills, FIXED for peripheral FIFOs, INCR for general memory. Fix: pair each type with its canonical use case.

The meta-skill at the intermediate level: lead with the concept, then immediately state the connection (what it enables / what constrains it / what it ties back to). A weak intermediate answer is almost always a correct definition missing its connection — diagnose the missing link and supply it.

7. Verification Insight

✅ Interview insight — at the intermediate level, the connection is the answer

The intermediate round tests whether you understand AXI as a system of interacting mechanisms, so the winning discipline extends 18.1's "core + why" to "core + connection": state the concept precisely, then name what it enables, what constrains it, or what it ties back to. The connections interviewers fish for, ready to state crisply: IDs → out-of-order completion (tags let independent transactions reorder while same-ID stays ordered to preserve dependencies); decoupled address/data → outstanding transactions (issuing addresses ahead of data puts many transactions in flight); outstanding → latency tolerance → throughput (the chain back to "why AXI is high-performance"); AxSIZE/AxLEN → burst span → 4 KB rule (the span the rule constrains, and why — page-bounded so one slave/one set of attributes); WSTRB → partial-word writes (byte enables avoid read-modify-write); burst types → use cases (INCR general, WRAP cache-line, FIXED peripheral FIFO). Two ordering facts must be exactly right because they're the most-tested and most-often-reversed: same-ID responses in order, different-ID in any order — and you should pair the rule with its rationale (order where there's a dependency, freedom where there isn't). Be ready to compute on the spot — burst span (LEN+1) << SIZE, per-beat increment 1 << SIZE, whether a given burst crosses 4 KB — because intermediate interviewers often ask a quick calculation to confirm the fields aren't just memorized labels. The failure mode at this level is the definition without the connection ("an ID is a tag," full stop), which reads as surface knowledge; the strong answer always closes the loop to what the mechanism does for the system. The through-line from 18.1 holds and deepens: at the beginner level you articulate facts with their why; at the intermediate level you articulate mechanisms with their connections — and the ability to synthesize (to trace decouple → outstanding → latency → throughput, or ID → reordering → preserved-dependencies) is exactly what distinguishes a competent candidate who memorized the spec from a strong one who understands the design. This synthesis skill is also what makes you valuable beyond interviews — in design discussions and trade-off analysis, reasoning about how AXI's mechanisms interact is the daily work — so practicing the connections is practicing the engineering judgment itself. Next, the advanced round pushes to outstanding-depth tuning, deadlock, and interconnect architecture, where the connections become multi-step system-level arguments.

8. Interview Questions

9. Summary

Intermediate AXI questions test connections between mechanisms, not isolated facts — the answer discipline extends 18.1's "core + why" to "core + connection" (name what a concept enables, constrains, or ties back to). The burst set: types (FIXED/peripheral-FIFO, INCR/general, WRAP/cache-line), AxLEN (beats−1) and AxSIZE (log2 bytes/beat) with span (LEN+1) << SIZE, and the 4 KB rule (a burst stays within one page — minimum page size — so it maps to one slave and one set of attributes; the rule constrains the span the fields define). The ID/ordering pair is probed hardest: IDs tag transactions to enable out-of-order completion, and the rules are same-ID in order, different-ID in any order — ordering where there's a dependency, freedom where there isn't. Plus WSTRB (per-byte enable → partial writes without read-modify-write) and outstanding transactions (from decoupling+IDs, hiding latency for throughput).

The strong-answer skill is synthesis — tracing chains like decouple → outstanding → IDs → out-of-order → latency-hidden → throughput, which is the real "why AXI is high-performance" answer. Be ready to compute on the spot (span, increment, 4 KB-crossing) since interviewers test that the fields aren't just memorized labels. The failure mode is the definition without the connection, which reads as surface knowledge. The through-line deepens from 18.1: beginner articulates facts-with-why, intermediate articulates mechanisms-with-connections — and the synthesis ability that distinguishes a strong candidate is the same reasoning-about-interactions that makes you valuable in design and trade-off work. Next, the advanced round pushes to outstanding-depth tuning, deadlock, and interconnect architecture, where connections become multi-step system-level arguments.

10. What Comes Next

You can now connect the core mechanisms; next, the advanced round:

18.3 — Advanced Interview Questions (coming next) — outstanding-depth tuning, deadlock, and interconnect architecture, where the connections become multi-step, system-level arguments and the bar is genuine design judgment.

Previous: 18.1 — Beginner Interview Questions. Related: 7.1 — Burst Fundamentals and 7.6 — The 4 KB Boundary Rule for the burst set, and 8.2 — Transaction IDs and 8.4 — Different-ID Ordering for the ID/ordering pair.