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DFT · Chapter 9 · Logic BIST (LBIST)

Why Logic BIST Exists

Memory BIST lets memories test themselves; logic BIST does the same for logic. Scan and ATPG rely on an external tester to apply deterministic patterns and compare against golden responses, which is ideal for manufacturing test but cannot do what logic BIST can. Its killer application is in-field test, because a chip in a car, aircraft, or medical device has no tester and must test itself at power-on or periodically for functional safety. Logic BIST also needs almost no external test data since patterns are generated on-chip. It works by driving the scan chains with a pseudo-random pattern generator, then compacting responses into a signature and comparing it to a known-good value. Because pseudo-random patterns give lower coverage per pattern and the signature is unknown-sensitive, logic BIST complements ATPG rather than replacing it.

Foundation12 min readDFTLBISTPRPGMISRIn-Field Test

Chapter 9 · Section 9.1 · Logic BIST (LBIST)

Project thread — MBIST self-tests the mini-SoC's memory (Ch8); LBIST now self-tests its logic for in-field/safety operation (9.5).

1. Why Should I Learn This?

LBIST is how logic tests itself with no tester — the basis of in-field and safety test, which scan/ATPG can't provide.

  • Scan/ATPG needs an external tester; LBIST generates patterns on-chip (PRPG) and compacts responses (MISR).
  • Killer app: in-field/power-on/periodic self-test for functional safety (ISO 26262).
  • Trade-offs: pseudo-random → more patterns, random-resistant faults, signature-only (no diagnosis), X-sensitive.
  • LBIST complements ATPG — often both (ATPG manufacturing coverage + LBIST in-field/safety).

2. Real Silicon Story — the safety part that couldn't test itself

A team built an automotive controller with excellent ATPG coverage — signed off on the tester, low DPPM (1.5). Then the safety assessment hit a wall: ISO 26262 required the part to detect faults during operation (power-on and periodically), to catch latent defects that develop over the vehicle's life. Their test was tester-only — useless in the field, where there's no ATE.

ATPG solved the manufacturing problem but not the in-field one. You cannot attach a tester to an ECU running in a car. The part needed to test itself — generate patterns on-chip, run them at power-on and periodically, and check the result with no external data or golden stream.

The fix was LBIST: an on-chip PRPG driving the scan chains and a MISR compacting responses into a signature compared on-chip → pass/fail, runnable at boot and in idle windows. It complemented the existing ATPG (which stayed for manufacturing). Lesson: ATPG needs a tester; safety needs self-test — and LBIST is the on-chip self-test for logic that in-field/safety operation demands.

3. Factory Perspective — LBIST through each lens

  • What the test engineer sees: two test modes — ATPG (tester, high manufacturing coverage) and LBIST (on-chip PRPG/MISR, tiny external data, at-speed) — reusing the same scan chains.
  • What the yield/reliability engineer sees: that LBIST catches latent/aging faults in the field — the runtime fault detection manufacturing test can't provide.
  • What the RTL/DV engineer sees: that LBIST demands an X-free design in test mode (9.4) and scan-ready logic — stricter than ATPG's needs.
  • What management cares about: that LBIST is the enabler for safety-critical markets (automotive/aero/medical) — a market-access requirement (ISO 26262), complementing ATPG's manufacturing DPPM (1.5).

4. Concept — tester test vs self-test

How scan/ATPG runs (Chapters 3–7):

  • An external tester (ATE) applies deterministic patterns and compares each response to golden (1.3).
  • High coverage (deterministic, targeted), per-pattern diagnosis — but needs a tester and stores/streams patterns + golden.

How LBIST runs (self-test):

  • On-chip PRPG (an LFSR) generates pseudo-random vectors → shifted into the scan chains.
  • Scan chains capture responses; a MISR compacts them (over all patterns) into a single signature.
  • A BIST controller seeds the PRPG, runs K patterns at-speed, then compares the final signature to a known-good value → pass/fail.
  • No tester, almost no external data, at-speed, self-contained — runnable in the field.

The trade-offs (why LBIST complements, not replaces, ATPG):

  • Pseudo-random → lower coverage per pattern: you need many more patterns to reach coverage, and random-resistant faults (hard to hit randomly) need help — test points, weighted random, or a deterministic top-up (ATPG patterns layered in).
  • Signature-only → no per-pattern diagnosis: a fail tells you something is wrong, not which pattern/fault (9.3).
  • X-sensitive: a single X entering the MISR corrupts the entire signature → stricter X-handling than ATPG/compression (9.4).

The complementary picture:

  • ATPG → manufacturing coverage (tester, deterministic, diagnosable).
  • LBIST → in-field/safety self-test (on-chip, at-speed, self-contained).
  • Real safety parts use both — and often the same scan chains serve both modes.
ATPG uses an external tester applying patterns and comparing golden; LBIST uses an on-chip PRPG and MISR to self-test and compare a signatureATPG (tester)ATE applies deterministicpatterns→ compare golden (perpattern)high coverage + diagnosis;NEEDS a testerLBIST (on-chip)PRPG → scan chains → MISR→ compare SIGNATURE(once)no tester, tiny data,at-speed → in-field12
Figure 1 - tester-based ATPG vs on-chip LBIST (representative). ATPG (Ch3-7): an EXTERNAL TESTER (ATE) applies deterministic patterns and compares each response to golden -> high coverage, per-pattern diagnosis, but NEEDS a tester + stored data. LBIST: an on-chip PRPG (LFSR) generates PSEUDO-RANDOM patterns into the scan chains; a MISR compacts all responses into a SIGNATURE compared on-chip -> pass/fail. No tester, tiny external data, at-speed, self-contained -> runnable IN THE FIELD. LBIST complements ATPG: ATPG for manufacturing coverage, LBIST for in-field/safety self-test.

5. Mental Model — a hospital lab vs a fitness tracker

ATPG and LBIST are like two kinds of health check — one needs a clinic, one you carry with you.

  • ATPG is a full hospital lab work-up: precise, comprehensive, diagnostic ('exactly which marker is off') — but you must go to the clinic (the tester), and it happens once (at manufacturing).
  • LBIST is a fitness tracker on your wrist: it can't do a full blood panel, and it only says 'something's off' (a pass/fail signature, no fine diagnosis) — but it goes everywhere with you and can check you continuously, in daily life (in-field, power-on, periodic), catching a problem that develops after you left the clinic (a latent/aging fault).
  • The tracker's readings are noisier (pseudo-random — needs many samples, and some conditions are hard to catch by random sampling — random-resistant), and a bad sensor reading (an X) can spoil the whole day's summary (the signature).
  • So you use both: the clinic work-up (ATPG) for a thorough baseline, and the wearable (LBIST) for ongoing, in-the-field monitoring the clinic can't do.

A wearable can't replace the lab — but the lab can't come with you. Safety needs the wearable: LBIST.

6. Working Example — ATPG vs LBIST, side by side

Contrast the two on the same design:

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Snippet
# ATPG (tester) vs LBIST (self-test) - REPRESENTATIVE, SIMPLIFIED, tool-neutral (same scan chains):
                          ATPG (Ch3-7)                     LBIST (this chapter)
  Pattern source          EXTERNAL tester (deterministic)  ON-CHIP PRPG (pseudo-random, LFSR)
  Response check          compare EACH response to golden  compact ALL into a SIGNATURE (MISR), compare once
  External data           patterns + golden (stored/stream) tiny (a seed + one golden signature)
  Coverage per pattern     HIGH (targeted)                  LOW (random) -> need MANY more patterns
  Random-resistant faults  handled directly                 need test points / weighting / deterministic top-up
  Diagnosis                per-pattern (which fault)         signature-only (pass/FAIL, no which) (9.3)
  X-sensitivity            per-pattern (mask, 7.4)           WHOLE signature ruined by ONE X (9.4)
  Runs where               on the TESTER (manufacturing)     ON-CHIP, at-speed -> IN THE FIELD (power-on/periodic, 9.5)
# LBIST COMPLEMENTS ATPG: ATPG for manufacturing coverage; LBIST for in-field/safety self-test. Often BOTH, same chains.

7. Industry Flow — LBIST reuses scan for self-test

LBIST is a second test mode on the same scan chains, aimed at in-field/safety:

Shared scan chains serve ATPG manufacturing test via the tester and LBIST in-field self-test via on-chip PRPG and MISRShared scan chains: ATPG (manufacturing) + LBIST (in-field/safety)Shared scan chains: ATPG (manufacturing) + LBIST (in-field/safety)1Full-scan chains (Ch3–4)reused by both modes2ATPG (tester, Ch5–7)manufacturing coverage → DPPM (1.5)3LBIST: PRPG → chains (9.2)on-chip pseudo-random patterns4MISR → signature (9.3)compact + compare on-chip → pass/fail5In-field/safety (9.5)power-on/periodic, no tester → ISO 26262
Figure 2 - LBIST alongside ATPG on shared scan chains (representative). The full-scan chains (Ch3-4) serve TWO modes. MANUFACTURING: ATPG (Ch5-7) via the tester -> high coverage, low DPPM. IN-FIELD/SAFETY: LBIST -- an on-chip PRPG (9.2) drives the same chains with pseudo-random patterns, a MISR compacts responses into a SIGNATURE (9.3) compared on-chip -> pass/fail, run at power-on/periodically (9.5) with NO tester. LBIST needs an X-free design (9.4). The two modes COMPLEMENT: ATPG for manufacturing coverage, LBIST for runtime safety self-test.

8. Debugging Session — a safety part with tester-only test

1

An automotive part has excellent ATPG coverage but the safety assessment requires in-field fault detection at power-on and periodically, which a tester-based test cannot provide because there is no ATE in the vehicle; the fix is to add LBIST (on-chip PRPG/MISR self-test) that runs in the field, complementing (not replacing) the ATPG manufacturing test

ATPG NEEDS A TESTER — IN-FIELD/SAFETY TEST REQUIRES ON-CHIP LBIST
Symptom

An automotive part has excellent ATPG coverage (manufacturing, on the tester) but fails its safety assessment: ISO 26262 requires fault detection during operation (power-on and periodic), and the team has no way to test the part in the vehicle.

Root Cause

ATPG is a tester-based manufacturing test — it fundamentally cannot run in the field, because there is no ATE in the vehicle, and safety requires the chip to detect faults itself during operation. ATPG's model (1.3) is that an external tester applies patterns and compares golden responses; it delivers high manufacturing coverage, but it is inseparable from the tester — the patterns and golden data live on the ATE, and the application/compare happens on the ATE. In a running car there is no tester: you cannot stream ATPG patterns or compare golden responses in an ECU on the road. But functional safety (ISO 26262) demands runtime fault detection — the part must catch latent/aging faults that develop over the vehicle's life, at power-on and periodically — precisely the scenario ATPG can't address. So the part has a manufacturing test (ATPG) but no in-field self-test, and the safety requirement for operational diagnostic coverage is unmet. This isn't an ATPG weakness for its job; it's a category limit — manufacturing test ≠ in-field test — and the safety case needs the latter.

Fix

Add LBIST — an on-chip PRPG/MISR self-test that runs in the field — to complement the ATPG manufacturing test. Insert an on-chip PRPG (an LFSR, 9.2) that drives the existing scan chains with pseudo-random patterns, and a MISR that compacts responses into a signature (9.3) compared on-chip → pass/fail, driven by a BIST controller. Schedule it to run at power-on (POST) and periodically / in idle windows during operation (9.5), giving the runtime diagnostic coverage safety requires — with no tester and tiny external data. Because LBIST's pseudo-random patterns cover less per pattern and struggle with random-resistant faults, plan test points / weighting / a deterministic top-up to reach the safety coverage target, and enforce an X-free design in LBIST mode (9.4) so the signature is valid. Keep ATPG for manufacturing coverage — LBIST complements, it doesn't replace, ATPG. The principle to lock in: scan/ATPG relies on an external tester to apply deterministic patterns and compare golden, which is ideal for manufacturing test but cannot run in the field, whereas logic BIST generates pseudo-random patterns on-chip with a PRPG and compacts responses into a signature with a MISR, compared on-chip with no tester — so in-field and functional-safety test (power-on and periodic fault detection, ISO 26262) requires LBIST, which complements ATPG rather than replacing it, at the cost of pseudo-random coverage, signature-only diagnosis, and strict X-sensitivity. (The PRPG/MISR architecture is 9.2; signatures/aliasing 9.3; X-handling 9.4; the in-field/safety detail is 9.5.)

9. Common Mistakes

  • Assuming ATPG covers in-field test. ATPG is tester-based — it can't run in the field; safety needs LBIST.
  • Treating LBIST as an ATPG replacement. LBIST complements ATPG — often both (manufacturing + in-field).
  • Expecting ATPG-level coverage per pattern. Pseudo-random covers less — plan more patterns + help for random-resistant faults.
  • Expecting per-pattern diagnosis. LBIST gives a signature (pass/fail), not which fault (9.3).
  • Ignoring X in LBIST. A single X ruins the whole signature — LBIST is stricter on X than ATPG (9.4).

10. Industry Best Practices

  • Use LBIST for in-field/safety self-test (power-on/periodic) — complement ATPG (manufacturing).
  • Reuse the scan chains for both modes — LBIST shares scan infrastructure.
  • Plan for pseudo-random limits — test points/weighting/deterministic top-up for random-resistant faults.
  • Enforce an X-free design in LBIST mode (9.4) — the signature demands it.
  • Size LBIST to the safety requirement — coverage and runtime window (9.5).

11. Senior Engineer Thinking

  • Beginner: "We have great ATPG coverage — the safety test is covered."
  • Senior: "ATPG runs on a tester — there's no ATE in the car. Safety needs in-field fault detection at power-on/periodically, which only self-test provides. I add LBIST — on-chip PRPG/MISR on the same scan chains — for the runtime coverage, keep ATPG for manufacturing, and enforce an X-free design so the signature is valid. Complement, not replace."

The senior separates manufacturing test (ATPG/tester) from in-field test (LBIST/self-test) and deploys both.

12. Silicon Impact

Logic BIST exists because manufacturing test and in-field test are different problems, and scan/ATPG — for all its coverage — is bound to a tester that doesn't exist in the field. That boundary is decisive for safety-critical markets: automotive (ISO 26262), aerospace, and medical require the chip to detect faults during operation — at power-on and periodically — to catch latent and aging defects that develop over the product's life, long after it left the factory. LBIST is the mechanism: an on-chip PRPG generates pseudo-random patterns into the existing scan chains, a MISR compacts responses into a signature compared on-chip, and a BIST controller runs it at-speed with no tester and almost no external data — exactly what in-field self-test needs. The honest engineering framing — and the theme of the chapter — is that LBIST complements ATPG, it doesn't replace it: its pseudo-random patterns cover less per pattern (so random-resistant faults need test points/weighting/deterministic top-up), it gives only a signature (no per-pattern diagnosis, 9.3), and it's acutely X-sensitive (a single unknown ruins the whole signature, 9.4). So real safety parts run both: ATPG for high manufacturing coverage on the tester (DPPM, 1.5) and LBIST for runtime safety self-test in the field, frequently on the same scan chains. For the DFT/RTL/safety engineer, this reframes LBIST as a market-access enabler — without it, a part cannot meet the operational diagnostic-coverage requirements of functional safety — and it sets up the rest of the chapter: the PRPG/MISR architecture (9.2), the signature/aliasing trade (9.3), the strict X-handling (9.4), and the in-field/safety deployment (9.5) that makes the mini-SoC safety-ready.

13. Engineering Checklist

  • Identified the in-field/safety requirement (power-on/periodic fault detection) — only LBIST meets it.
  • Added LBIST (PRPG/MISR) on the existing scan chains — complementing ATPG.
  • Planned for pseudo-random limits (random-resistant faults → test points/weighting/deterministic top-up).
  • Enforced an X-free design in LBIST mode (9.4) for a valid signature.
  • Sized LBIST to the safety coverage + runtime window (9.5); kept ATPG for manufacturing (1.5).

14. Try Yourself

  1. List three things a tester-based ATPG cannot do that LBIST can (in-field, tiny external data, power-on/periodic).
  2. Sketch the LBIST datapath: PRPG → scan chains → MISR → signature compare.
  3. Explain why pseudo-random patterns need many more patterns and struggle with random-resistant faults.
  4. Contrast per-pattern diagnosis (ATPG) with signature-only (LBIST) — what you lose (9.3).
  5. State why a safety part needs both ATPG (manufacturing) and LBIST (in-field) — complement, not replace.

The concepts are tool-neutral; LBIST/PRPG/MISR come from the DFT flow. No paid tool required to reason about why LBIST exists.

15. Interview Perspective

  • Weak: "LBIST tests logic on-chip instead of with a tester."
  • Good: "An on-chip PRPG generates patterns and a MISR compacts responses into a signature, so the chip self-tests without a tester."
  • Senior: "Scan/ATPG needs an external tester to apply patterns and compare golden — great for manufacturing, but it can't run in the field. LBIST self-tests logic on-chip: a PRPG (LFSR) drives the scan chains with pseudo-random patterns, a MISR compacts responses into a signature compared on-chip → pass/fail — no tester, tiny data, at-speed. Its killer app is in-field/safety self-test — power-on and periodic fault detection for ISO 26262 — which a tester can't do. The trade-offs are real: pseudo-random → more patterns + random-resistant faults, signature-only (no diagnosis), and X ruins the whole signature. So LBIST complements ATPG — often both, on the same scan chains: ATPG for manufacturing coverage, LBIST for runtime safety."

16. Interview / Review Questions

17. Key Takeaways

  • Scan/ATPG needs an external tester to apply deterministic patterns and compare golden (1.3) — ideal for manufacturing but it cannot run in the field.
  • Logic BIST (LBIST) lets logic test itself on-chip: a PRPG (LFSR) drives the scan chains with pseudo-random patterns, a MISR compacts responses into a signature compared on-chip → pass/fail — no tester, tiny external data, at-speed.
  • The killer app is in-field/safety self-test — power-on and periodic fault detection for functional safety (ISO 26262), catching latent/aging defects manufacturing test can't (9.5).
  • Trade-offs vs ATPG: pseudo-random → lower coverage per pattern (more patterns; random-resistant faults need help), signature-only (no per-pattern diagnosis, 9.3), and acute X-sensitivity (one X ruins the whole signature, 9.4).
  • So LBIST complements ATPG, it doesn't replace it — safety parts run both (ATPG manufacturing coverage + LBIST in-field/safety), often on the same scan chains. Next: 9.2 — LBIST architecture (PRPG / MISR).

18. Quick Revision

Why logic BIST exists (Ch9 opener). Scan/ATPG needs an EXTERNAL TESTER (apply patterns + compare golden, 1.3) → great for MANUFACTURING but CAN'T run in the field. LBIST = logic SELF-test: on-chip PRPG (LFSR) drives the scan chains with PSEUDO-RANDOM patterns; a MISR compacts responses into a SIGNATURE compared on-chip → pass/fail. No tester, tiny external data, at-speed. Killer app: IN-FIELD/SAFETY (power-on + periodic fault detection, ISO 26262 — latent/aging faults). Trade-offs: pseudo-random → MORE patterns + random-resistant faults; signature-only (no diagnosis, 9.3); X-SENSITIVE (one X ruins the whole signature, 9.4). LBIST COMPLEMENTS ATPG (both, same scan chains): ATPG manufacturing, LBIST in-field/safety. Next: 9.2 — PRPG / MISR architecture.