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DFT · Chapter 9 · Logic BIST (LBIST)

LBIST Architecture (PRPG / MISR)

This lesson builds the logic BIST architecture, two blocks wrapped around the existing scan chains in an arrangement commonly called STUMPS. On the input side a pseudo-random pattern generator, an LFSR followed by a phase shifter, produces pseudo-random vectors shifted into the scan chains. It resembles the compression decompressor but generates random stimulus rather than solving for care bits. On the output side a multiple-input signature register, an LFSR fed from the scan-chain outputs, compacts every response over all patterns into a single fixed-width signature by accumulating through feedback over time. A small controller seeds the generator, runs a fixed number of patterns at speed, lets the signature register accumulate, then compares the final signature to a precomputed golden value. Unlike compression, LBIST is pseudo-random, uses one accumulated signature, and needs no tester.

Intermediate13 min readDFTPRPGMISRSTUMPSLFSR

Chapter 9 · Section 9.2 · Logic BIST (LBIST)

Project thread — this PRPG/MISR (STUMPS) architecture runs LBIST on the mini-SoC's logic; 9.3 covers the signature math, 9.5 the in-field deployment.

1. Why Should I Learn This?

STUMPS (PRPG → scan chains → MISR) is the standard LBIST architecture — and understanding it explains how self-test actually works.

  • PRPG = LFSR + phase shifterpseudo-random patterns into the scan chains.
  • MISR = multi-input LFSRaccumulates all responses into one signature.
  • Controller seeds the PRPG, runs K patterns at-speed, compares the signature to golden.
  • Contrast compression: deterministic/per-pattern/tester vs pseudo-random/one signature/on-chip.

2. Real Silicon Story — the good part that 'failed' LBIST

An engineer ran LBIST on a known-good part and got a signature mismatch — the hardware's signature didn't equal the golden. Panic: a fault? A broken design?

Neither. The golden signature had been computed by simulation with one PRPG seed and pattern count, but the hardware was configured with a different seed (and a slightly different K). Since the signature is an accumulation over exactly the patterns the PRPG produces, a different seed produces a different pattern sequence → a different (but equally valid) signature. The good machine's signature simply didn't match a golden computed for a different runnot a fault, a config mismatch.

Once the golden was recomputed for the exact hardware config (same seed, polynomial, K, MISR), the good part matched — and a true mismatch would then mean a real fault. Lesson: the golden signature is only valid for the precise PRPG/MISR configuration the hardware runs — seed, polynomial, pattern count, MISR width — so a mismatch on a known-good part is almost always a golden/config mismatch, not a defect.

3. Factory Perspective — the architecture through each lens

  • What the test/DFT engineer sees: the STUMPS config — PRPG polynomial/seed, MISR width, K patterns — and the golden signature that must match that config.
  • What the verification engineer sees: that the golden signature is simulated for the exact config — a golden-generation responsibility (get the seed/K/MISR right).
  • What the RTL/DV engineer sees: that LBIST reuses their scan chains and demands X-free logic in LBIST mode (9.4) so the MISR signature is valid.
  • What management cares about: that LBIST is tiny hardware (a PRPG + MISR + FSM) reusing existing scan — a low-area enabler for in-field/safety (9.5).

4. Concept — PRPG, MISR, STUMPS, and the controller

PRPG (pseudo-random pattern generator):

  • An LFSR (a shift register with XOR feedback per a characteristic polynomial) generates a pseudo-random bit sequence; a phase shifter (XOR network) spreads it across many scan chains with decorrelated sequences.
  • Seeded by the controller; each shift cycle yields the next pseudo-random bits. Like the compression decompressor structurally, but random, not care-bit-solved.

Scan chains:

  • The existing full-scan chains (Chapters 3–4) load the pseudo-random pattern and, on capture, hold the response.

MISR (multiple-input signature register):

  • An LFSR with multiple inputs — the scan-chain outputs feed into it — with XOR feedback.
  • It compacts the responses over all K patterns (accumulating through feedback) into one fixed-width signature. Like the compression compactor, but temporal/accumulating into one value, not per-pattern.

STUMPS:

  • The composite architecture: PRPG → many parallel scan chains → MISR, run for K pseudo-random patterns at-speed.

The BIST controller (FSM):

  1. Seed the PRPG (a known start state).
  2. Run K patterns: for each, shift the pseudo-random pattern in, capture, shift the response out into the MISR (which accumulates).
  3. Read the final signature and compare to a precomputed golden signaturepass/fail.

Contrast with compression (Chapter 7):

Compression (Ch7)LBIST (this chapter)
Inputdeterministic decompressor (solves care bits)pseudo-random PRPG
Output checkspatial compactor, per-pattern goldentemporal MISR, one signature
Runs ona tester (manufacturing)on-chip (in-field/safety)
Golden dataall patterns' expectedone signature
  • Both reuse the scan chains — LBIST is scan infrastructure repurposed for self-test.

The golden-signature discipline:

  • The golden signature is only valid for the exact PRPG seed/polynomial, pattern count K, and MISR — a mismatch there mimics a fault (the story).
A PRPG drives many scan chains with pseudo-random patterns; a MISR accumulates all responses into one signature; a controller seeds, runs K patterns, and compares to goldenPRPG (LFSR + phaseshifter)pseudo-random patternsScan chains (reused)load pattern, captureresponseMISR (multi-inputLFSR)accumulate all responses →one signatureBIST controller (FSM)seed → run K patternsat-speedSignaturefixed-width accumulatedvalueCompare to golden →pass/failgolden must match the exactconfig12
Figure 1 - the STUMPS LBIST architecture (representative). A PRPG (LFSR + PHASE SHIFTER) generates PSEUDO-RANDOM patterns into the many parallel SCAN CHAINS (reused from Ch3-4). Each pattern is shifted in, captured, and shifted out into the MISR (a MULTI-INPUT LFSR) which ACCUMULATES all responses over K patterns into ONE fixed-width SIGNATURE. The BIST CONTROLLER seeds the PRPG, runs K patterns at-speed, then reads the signature and COMPARES it to a precomputed GOLDEN signature -> pass/fail. Contrast Ch7 compression: deterministic decompressor + per-pattern golden on a tester; LBIST is pseudo-random + one accumulated signature on-chip.

5. Mental Model — a dice-roller and a running checksum

STUMPS is like testing a machine by feeding it dice rolls and keeping a single running checksum of everything it produced.

  • The PRPG is a dice-roller — it generates a reproducible stream of 'random' inputs (reproducible because it starts from a known seed and follows fixed rules, an LFSR). It sprays those rolls across many input slots (the phase shifter → scan chains).
  • The machine reacts to each roll (capture); instead of writing down every reaction, you keep a single running checksum — the MISR — that folds every reaction into one number as you go.
  • At the end, you compare your checksum to the 'known-good' checksum (the golden signature) computed by someone who ran the same dice from the same seed on a known-good machine. Match → pass; differ → something reacted wrong.
  • The catch: your checksum is only comparable to a golden computed from the same seed and same number of rollschange the seed and you get a different (but valid) checksum, which won't match the wrong golden (the story).

Reproducible dice in (PRPG), one running checksum out (MISR), compared to a checksum from the same dice on a good machine (golden).

6. Working Example — a STUMPS run and its config

Trace a STUMPS LBIST run and the golden-signature discipline:

Azvya Education Pvt. Ltd.VLSI Mentor
Snippet
# STUMPS LBIST run - REPRESENTATIVE, SIMPLIFIED, tool-neutral:
  Config: PRPG = LFSR(poly P, seed S) + phase shifter -> 120 scan chains ; MISR width = 32 ; K = 10,000 patterns
  Controller:
    1) SEED the PRPG with S
    2) for k = 1..K:  shift pseudo-random pattern into the 120 chains ; CAPTURE ; shift response into the MISR (accumulate)
    3) after K patterns: read the 32-bit SIGNATURE ; COMPARE to golden signature G
    -> signature == G  -> PASS ; signature != G -> FAIL
  GOLDEN G is precomputed by SIMULATION using the EXACT config: same poly P, seed S, K, MISR -> the good-machine signature.
# Same scan chains as ATPG/compression -- LBIST is scan reused for SELF-test (pseudo-random in, one signature out).
Azvya Education Pvt. Ltd.VLSI Mentor
Snippet
# Compression (Ch7) vs LBIST (Ch9) - REPRESENTATIVE contrast:
  COMPRESSION: DETERMINISTIC decompressor (solves care bits) -> chains -> spatial compactor -> PER-PATTERN compare, TESTER
  LBIST:       PSEUDO-RANDOM PRPG            -> chains -> temporal MISR    -> ONE signature compare, ON-CHIP (no tester)
# Both reuse the scan chains. Compression = manufacturing (tester); LBIST = in-field/safety (self-test, 9.5).

7. Industry Flow — seed, run, accumulate, compare

The controller runs a self-contained loop from seed to signature compare:

Seed the PRPG, run K pseudo-random patterns capturing responses into the MISR, read the accumulated signature, and compare to the goldenSTUMPS run: seed → run K patterns → accumulate → compare signatureSTUMPS run: seed → run K patterns → accumulate → compare signature1Seed the PRPGknown start state2Run K patterns (at-speed)shift in → capture → shift into MISR3MISR accumulatesfold every response into one signature4Read signaturefixed-width value after K patterns5Compare to goldenmatch=pass; differ=fail (golden must match config)
Figure 2 - a STUMPS LBIST run (representative). SEED: the controller loads a known seed into the PRPG. RUN K PATTERNS: for each, the PRPG shifts a pseudo-random pattern into the scan chains, a CAPTURE clock exercises the logic at-speed, and the response is shifted into the MISR, which ACCUMULATES it. After K patterns, READ the fixed-width SIGNATURE and COMPARE it to the precomputed GOLDEN (simulated for the exact seed/K/MISR). Match -> pass; differ -> fail. A mismatch on a known-good part usually means the golden was computed for a different config (recompute golden).

8. Debugging Session — signature mismatch on a known-good part

1

LBIST reports a signature mismatch on a known-good part and the team suspects a fault; the golden signature was computed for a different PRPG seed or pattern count than the hardware runs, and since the signature accumulates over exactly the patterns the PRPG produces, a different config yields a different but valid signature -- so the fix is to recompute the golden for the exact hardware config, after which a true mismatch means a real fault

THE GOLDEN SIGNATURE IS VALID ONLY FOR THE EXACT PRPG/MISR CONFIG
Symptom

LBIST reports a signature mismatch on a known-good part (verified good by ATPG on the tester). The team suspects a fault or a broken LBIST.

Root Cause

The golden signature was computed for a different PRPG seed / pattern count / MISR config than the hardware actually runs, and because the signature is an accumulation over exactly the patterns the PRPG produces, a different config yields a different — but perfectly valid — signature that won't match the wrong golden. The MISR signature is a deterministic function of the entire response stream, which is itself a deterministic function of the PRPG seed and polynomial (which fix the pattern sequence), the number of patterns K, and the MISR structure. So the good-machine signature is specific to that exact configuration. If the golden was simulated with a different seed (or K, or MISR width/polynomial) than the hardware is configured with, then even a perfectly good chip produces a signature that legitimately differs from that golden — not because anything is faulty, but because you're comparing to the answer for a different run. This is a config/golden mismatch, the single most common LBIST bring-up gotcha, and it's especially easy to hit because the signature is a single opaque value with no per-pattern diagnosis (9.3) — so it looks like a fault with no clue to the contrary.

Fix

Recompute the golden signature for the exact hardware configuration — same PRPG seed and polynomial, same pattern count K, same MISR — then re-run; a match confirms good, and a remaining mismatch is a real fault. Extract the actual hardware config (PRPG seed/polynomial, phase shifter, K, MISR width/polynomial), and have verification simulate the good machine with that config to produce the correct golden signature. Re-run LBIST on the known-good part: it should now match. With the golden locked to the config, a subsequent mismatch on another part is a genuine fault (something in the logic responded differently). Lock the config + golden together as a versioned pair so they can't drift. The principle to lock in: LBIST (STUMPS) uses an on-chip PRPG (LFSR + phase shifter) to drive the scan chains with pseudo-random patterns and a MISR (multi-input LFSR) to accumulate all responses into a single signature, compared on-chip to a precomputed golden — and because the signature is a deterministic accumulation over exactly the patterns the PRPG's seed and polynomial produce for K patterns through a specific MISR, the golden signature is valid only for that exact configuration; a mismatch on a known-good part is therefore almost always a golden/config mismatch (wrong seed, K, or MISR), fixed by recomputing the golden to match the hardware, after which a true mismatch is a real fault. (Signatures and aliasing are 9.3; X-handling that would also corrupt the signature is 9.4.)

9. Common Mistakes

  • Golden computed for a different config. The signature is config-specific — recompute golden for the exact seed/K/MISR.
  • Confusing PRPG with a decompressor. PRPG is pseudo-random; the compression decompressor is deterministic (care-bit-solved).
  • Confusing MISR with a spatial compactor. MISR accumulates over time into one signature; the compactor is per-pattern spatial.
  • Forgetting the phase shifter. Without it, chains get correlated PRPG sequences — poorer randomness.
  • Ignoring X into the MISR. A single X ruins the whole signature (9.4) — LBIST needs an X-free design.

10. Industry Best Practices

  • Version the config + golden together — seed, polynomial, K, MISR — so they never drift.
  • Reuse the scan chains (STUMPS) — LBIST is scan repurposed for self-test.
  • Use a phase shifter for decorrelated chain sequences (better randomness).
  • Precompute the golden by simulation for the exact hardware config.
  • Enforce X-free logic in LBIST mode (9.4) — the MISR signature demands it.

11. Senior Engineer Thinking

  • Beginner: "LBIST signature doesn't match golden — the part is faulty."
  • Senior: "On a known-good part, a mismatch is almost always a golden/config problem — the signature accumulates over exactly the PRPG's patterns, so a different seed/K/MISR gives a different valid signature. I recompute the golden for the exact hardware config, re-run, confirm the good part matchesthen a mismatch means a real fault. Config and golden are a versioned pair."

The senior treats a known-good mismatch as a config/golden issue and locks the golden to the exact PRPG/MISR config.

12. Silicon Impact

The PRPG/MISR (STUMPS) architecture is what makes logic self-test practical: a tiny LFSR-based generator and a tiny LFSR-based signature register, wrapped around the scan chains you already have, turn the chip into its own tester — the hardware basis for the in-field/safety capability of 9.1/9.5. The two blocks are best understood by their contrast with compression (Chapter 7), which reuses the same scan chains for a different purpose: compression's decompressor is deterministic (it solves care bits to deliver exact ATPG patterns) and its compactor checks per pattern on a tester; LBIST's PRPG is pseudo-random (no solving — just a reproducible random stream) and its MISR accumulates over time into a single signature compared on-chip. That single accumulated signature is LBIST's great efficiency (tiny result, no per-pattern golden) and its great fragility — two properties the rest of the chapter develops: it is lossy (so aliasing is possible, 9.3) and it is ruined by any X (so X-handling is strict, 9.4). The most operationally important consequence of the architecture is the golden-signature discipline: because the signature is a deterministic accumulation over exactly the patterns the PRPG's seed and polynomial produce for K patterns through a specific MISR, the golden is valid only for that exact config — so a mismatch on a known-good part is almost always a golden/config mismatch, not a fault (the story), and teams must version the config and golden together. For the DFT/verification engineer, STUMPS is a low-area addition that reuses scan and shifts the burden to getting the golden right (a simulation task) and keeping the design X-free in LBIST mode — the groundwork for the signature math (9.3), X-bounding (9.4), and the in-field/safety deployment (9.5) that make the mini-SoC's logic self-testing.

13. Engineering Checklist

  • Built STUMPS: PRPG (LFSR + phase shifter) → scan chains → MISR with a BIST controller.
  • Precomputed the golden signature by simulation for the exact config (seed/polynomial/K/MISR).
  • Versioned config + golden together — no drift.
  • Used a phase shifter for decorrelated chain sequences.
  • Enforced X-free logic in LBIST mode (9.4) so the signature is valid.

14. Try Yourself

  1. Draw STUMPS: PRPG → scan chains → MISR → signature compare, with the controller seeding/running.
  2. Explain how the PRPG (LFSR + phase shifter) produces pseudo-random patterns across many chains.
  3. Explain how the MISR accumulates all responses into one signature (temporal, feedback).
  4. Contrast LBIST (pseudo-random / one signature / on-chip) with compression (deterministic / per-pattern / tester).
  5. Show why a different PRPG seed yields a different valid signaturegolden must match the config.

The architecture is tool-neutral; STUMPS/PRPG/MISR come from the DFT flow. No paid tool required to reason about it.

15. Interview Perspective

  • Weak: "LBIST has a pattern generator and a signature register."
  • Good: "A PRPG (LFSR) makes pseudo-random patterns into the scan chains, and a MISR compacts responses into a signature."
  • Senior: "LBIST's standard architecture is STUMPS: a PRPG — an LFSR + phase shifter — drives the scan chains with pseudo-random patterns, and a MISR — a multi-input LFSRaccumulates all responses over K patterns into one signature. A controller seeds the PRPG, runs K patterns at-speed, and compares the signature to a precomputed golden → pass/fail. It's the compression architecture repurposed: instead of a deterministic decompressor + per-pattern compactor on a tester, it's a pseudo-random PRPG + temporal MISR + one signature on-chip. Crucially, the golden signature is valid only for the exact seed/polynomial/K/MISR — so a mismatch on a known-good part is almost always a golden/config problem, not a fault; I version config + golden together. And the design must be X-free in LBIST mode or a single X ruins the signature."

16. Interview / Review Questions

17. Key Takeaways

  • LBIST's standard architecture is STUMPS: a PRPG (LFSR + phase shifter) drives the existing scan chains with pseudo-random patterns, and a MISR (multi-input LFSR) accumulates all responses over K patterns into a single signature.
  • A BIST controller seeds the PRPG, runs K patterns at-speed, and compares the final signature to a precomputed goldenpass/fail — all on-chip, reusing scan.
  • Contrast with compression (Chapter 7): compression uses a deterministic decompressor (solves care bits) and a per-pattern compactor on a tester; LBIST uses a pseudo-random PRPG and a temporally-accumulating MISR signature on-chip — same chains, self-test purpose.
  • The golden signature is valid only for the exact configuration (PRPG seed/polynomial, pattern count K, MISR) — so a mismatch on a known-good part is almost always a golden/config mismatch, not a fault; version config + golden together.
  • The single accumulated signature is LBIST's efficiency (tiny result) and its fragility — it is lossy (aliasing, 9.3) and ruined by any X (9.4), so LBIST demands an X-free design. Next: 9.3 — signature analysis & aliasing.

18. Quick Revision

LBIST architecture (PRPG / MISR / STUMPS). PRPG = LFSR + phase shifter → PSEUDO-RANDOM patterns into the scan chains (like a decompressor but RANDOM, not care-bit-solved). MISR = multi-input LFSR → ACCUMULATES all responses over K patterns into ONE fixed-width SIGNATURE (like a compactor but TEMPORAL/feedback, not per-pattern). STUMPS = PRPG → many scan chains → MISR. Controller: seed PRPG → run K patterns at-speed → read signature → compare to precomputed GOLDEN → pass/fail. Contrast Ch7 compression: deterministic decompressor + per-pattern golden on a TESTER; LBIST = pseudo-random + ONE signature ON-CHIP. Golden signature valid ONLY for the exact seed/poly/K/MISR → a known-good mismatch = golden/config mismatch (recompute golden, version them together). Needs X-free design (9.4). Next: 9.3 — signature analysis & aliasing.