Common DFT Mistakes & How to Avoid Them

Chapter 13 · Section 13.6 · DFT Debug Methodology — chapter closer & debug-chapter cap

Project thread — the mini-SoC's lessons-learned catalog: every mistake mapped to its phase, root cause, and upstream fix. This closes Chapter 13 and sets up Chapter 14 (apply the whole method end-to-end).

1. Why Should I Learn This?

A mistakes catalog turns hard-won debug lessons into a repeatable gate — a signoff-review checklist that stops the same mistakes from recurring.

• Recurring mistakes cluster by phase — RTL, scan/DRC, ATPG/coverage, compression, timing, debug — each with a symptom / why / avoid.
• DFT is a chain from RTL to silicon — a mistake surfaces later and costs more → fix upstream.
• The many symptoms trace to a few root causes: unmasked X, unconstrained mode, skipped structural check, failure-as-verdict.
• The debug method is the safety net, not the plan — the catalog is the gate that keeps mistakes from recurring.

2. Real Silicon Story — the escape that was born in RTL

A part shipped and then showed a field escape — a defect that test missed. The post-mortem chased the tester and the ATPG patterns, but the trail led upstream, all the way to RTL.

The root cause was a single unmasked X. An uninitialized flop in RTL (A-group mistake) produced an X; ATPG left it unmasked (C-group); compression then folded that X into a compactor signature (D-group), which masked the observability that would have flagged the affected logic; and the resulting coverage hole let a real defect escape — discovered only in the field. Every stage had a chance to catch it, and each applied a known mistake from the catalog. The fix was not at the tester — it was upstream: initialize the flop and mask the X at its source (killing the problem at birth), which restored the coverage and closed the hole. Then they added the checklist gate — "no unmasked X into ATPG" — so it couldn't recur. Lesson: DFT is a chain from RTL to silicon; a mistake surfaces later and costs more, and the cheapest fix is upstream. Most escapes trace to a few root causes (here, an unmasked X) — fix the class, add the gate, and the mistake stops recurring.

3. Factory Perspective — the catalog through each lens

• What the RTL/DV engineer sees: the A/C-group mistakes — init state, mask X, scan-safe clocks, honest coverage — the upstream fixes that are cheapest.
• What the DFT engineer sees: the whole chain — scan/DRC (B), compression (D), timing (E), debug (F) — and how a mistake propagates across phases.
• What the STA engineer sees: the E-group — multi-mode STA, all modes clean = test-clean (12.5) — the timing mistakes that ship if skipped.
• What management cares about: that the catalog is a signoff-review gate that prevents the expensive late failures (escapes, scrapped silicon) — quality, yield, and schedule protected by a checklist.

4. Concept — the catalog by phase, and the root causes

A — RTL / design-for-test mistakes (feed scan/DRC):

• Uninitialized state (an X source, 13.3), gated clocks/latches/async not scan-safe (4.x), non-scan flops in datapaths, no test-mode isolation (11.x), unplanned chains (3.x).
• Symptom: DRC violations, low coverage, X-mismatches. Avoid: scan-ready RTL (4.x), initialize, isolate, plan chains.

B — scan / DRC mistakes:

• Ignoring DRC warnings, uncontrolled clocks/resets in shift, no lock-up latches across domains (4.x/12.2), poor chain balancing (3.x).
• Symptom: chain fails, shift-hold violations. Avoid: clean DRC, lock-ups, balance.

C — ATPG / coverage mistakes:

• Chasing 100% blindly, confusing test vs fault coverage (6.x), ignoring untestable/redundant, leaving X unmasked, over-trusting coverage as quality proof.
• Symptom: false confidence, wasted patterns, X-mismatches. Avoid: understand coverage limits, mask X, classify faults.

D — compression mistakes:

• Over-compressing (too few care bits → coverage loss, 7.x), no diagnostic/bypass mode (kills diagnosability, 13.4), X not bounded (corrupts the signature, 7.x/9.x).
• Symptom: coverage loss, loose diagnosis, aliasing. Avoid: balance compression, provide a diagnostic mode, bound X.

E — timing / SDC mistakes (Ch12):

• Constraining only functional, no shift-hold checks, no capture/at-speed constraints, unhonored false/multicycle at-speed, unconstrained scan-enable.
• Symptom: silicon chain miscompares, false at-speed fails, functional-clean-but-test-broken. Avoid: multi-mode STA, all modes clean = test-clean (12.5).

F — debug / method mistakes (Ch13):

• Failure as a verdict (13.1), patterns before flush (13.2), miscompare before the expected value (13.3), scrapping on X-noise (13.3), dirty-datalog diagnosis (13.4), at-speed on first silicon (13.5), verdict over environment (13.5).
• Symptom: scrapped good silicon, shipped defects, days lost. Avoid: the fork, structure-before-function, golden sim, trust the environment.

The few root causes → the many symptoms:

• Nearly every catalog entry traces to one of: an unmasked X, an unconstrained mode, a skipped structural check, or a failure treated as a verdict. Fix the class, not each symptom.

The meta-lesson:

• DFT is a chain from RTL to silicon — a mistake surfaces later and costs more → fix upstream. The debug method (Ch13) is the safety net, not the plan.

5. Mental Model — the Swiss-cheese model of test escapes

The DFT mistake catalog is the Swiss-cheese model of accident prevention: each phase is a slice with holes, and an escape happens only when the holes line up.

• RTL, scan/DRC, ATPG, compression, timing, debug are slices stacked between a defect and the customer. Each slice is a defense (a review, a check, a mask). Each has holes (its mistakes).
• A single mistake (one hole) usually doesn't cause an escape — a later slice catches it. The field escape happens when the holes line up: an unmasked X (hole in RTL) passes an unmasked ATPG (hole in C), gets hidden by compression (hole in D), and slips past debug (hole in F) — a straight line to the customer.
• The catalog's job is to shrink every hole at every slice — but the most leverage is on the first slice (RTL), because a hole plugged upstream means nothing ever reaches the later holes. Fix upstream = remove the hole at the source.
• And you don't plug holes one accident at a time (per symptom) — you redesign the slice to remove a class of holes (mask all X, constrain all modes) — because the few root causes punch the many holes.

Stacked defensive slices with holes — an escape needs the holes to line up; shrink every hole, but plug the upstream slice first, and remove hole classes, not one accident at a time.

6. Working Example — a mistake traced through the chain

Trace one mistake across phases to its upstream root cause:

# One mistake, traced through the DFT chain - REPRESENTATIVE, tool-neutral:
  PHASE A (RTL)        : an uninitialized flop -> an X source                          [root cause: UNMASKED X]
     |  (not caught: no init, no scan-safety review)
  PHASE C (ATPG)       : the X is left UNMASKED -> propagates to compare points        [symptom: X-mismatches]
     |  (not caught: over-trusting coverage, X not classified)
  PHASE D (compression): the X folds into the compactor SIGNATURE -> aliasing          [symptom: signature corruption]
     |  (not caught: X not bounded, no diagnostic mode)
  PHASE C/coverage     : a coverage HOLE opens where observability was lost            [symptom: false confidence]
     |  (not caught: coverage read as a quality proof)
  PHASE silicon        : a real defect in that hole ESCAPES -> field return            [symptom: ESCAPE]
  --- WHERE TO FIX ---
     WRONG: at the tester (chase the symptom die-by-die)  -> expensive, recurs
     RIGHT: UPSTREAM at PHASE A -> initialize the flop + mask the X at its source -> the whole chain clears
  --- THEN GATE IT ---
     add the checklist rule "NO UNMASKED X INTO ATPG" to the signoff review -> the mistake CANNOT recur
  ROOT-CAUSE CLASSES (fix these, not each symptom): unmasked X | unconstrained mode | skipped structural check | verdict-not-data

A few root-cause classes explain the many symptoms across the catalog:

7. Industry Flow — the avoid-it workflow, phase by phase

Avoiding the catalog is a phase-by-phase discipline: scan-ready RTL, clean DRC, honest coverage, balanced compression, multi-mode timing, disciplined debug:

8. Debugging Session — a mystery escape traced back through the catalog

9. Common Mistakes (the meta-mistakes about the catalog)

• Treating the catalog as trivia, not a gate. Run it as a signoff-review checklist — that's where it prevents failures.
• Fixing symptoms, not classes. Trace to the root cause (unmasked X / unconstrained mode / skipped structural check / verdict-not-data).
• Fixing at the tester, not upstream. A mistake surfaces late but is cheapest at its source — fix upstream.
• Not adding a gate after a bug. Every mistake fixed → a checklist rule so it can't recur (and a lessons-learned entry, and a BUG_LOG note).
• Treating the debug method as the plan. Ch13 is the safety net — the plan is to avoid the mistakes upstream.

10. Industry Best Practices

• Run the per-phase catalog as a signoff-review gate — RTL → scan/DRC → ATPG → compression → timing → debug.
• Fix root-cause classes upstream — mask all X, constrain all modes, verify structure first, fork every failure.
• Add a checklist gate after every bug — turn each lesson into a rule that can't recur; keep a lessons-learned log.
• Read cost as rising downstream — invest in scan-ready RTL, clean DRC, honest coverage, balanced compression, multi-mode STA.
• Keep the debug method as the safety net — not the plan; the plan is prevention.

11. Senior Engineer Thinking

• Beginner: "We keep getting escapes — let's tune the tester and the patterns again."
• Senior: "A recurring escape isn't a tester problem — DFT is a chain, so I trace it upstream. This one's an unmasked X born in RTL (uninit flop), let through by unmasked ATPG and hidden by compression — the holes lined up. I fix it at the source (init + mask), which clears the whole chain, and I add a checklist gate so it can't recur. Fix the class upstream; make the catalog the gate. The debug method is my safety net — not my plan; the plan is to not make the mistake in the first place."

The senior traces recurring failures to an upstream root-cause class, fixes at the source, and adds a gate so the mistake can't recur.

12. Silicon Impact

The mistakes catalog is the capstone of the debug chapter and the consolidation of the entire DFT track, because it reframes thirteen chapters of technique into a single operational truth: DFT is a chain of ownership from RTL to silicon, and a mistake at any stage surfaces later and more expensively. The catalog organizes the recurring mistakes by phase — (A) RTL / design-for-test (uninitialized state, non-scan-safe clocks/latches, missing isolation, unplanned chains), (B) scan / DRC (ignored warnings, uncontrolled shift clocks/resets, missing lock-ups, poor balancing), (C) ATPG / coverage (chasing 100% blindly, confusing test vs fault coverage, ignoring untestable/redundant faults, unmasked X, over-trusting coverage as quality proof), (D) compression (over-compression, no diagnostic/bypass mode, unbounded X), (E) timing / SDC (functional-only constraints, no shift-hold checks, no capture/at-speed constraints, unhonored false/multicycle, unconstrained scan-enable), and (F) debug / method (failure-as-verdict, patterns-before-flush, miscompare-before-expected-value, scrapping on X-noise, dirty-datalog diagnosis, at-speed-on-first-silicon, verdict-over-environment) — each with the symptom it causes, why it happens, and how to avoid it, so the catalog doubles as a signoff-review checklist. Two structural insights make it powerful. First, cost rises downstream: the same mistake — say an unmasked X — is cheapest to fix in RTL and most expensive to discover as a field escape, so the discipline is fix upstream, and the debug method (Ch13) is the safety net, not the plan. Second, the many symptoms trace to a few root-cause classes: an unmasked X, an unconstrained mode, a skipped structural check, or a failure treated as a verdict — so you fix the class at its source (mask all X, constrain all modes, verify structure first, fork every failure) rather than chasing each symptom, and you convert each lesson into a checklist gate so it can't recur (a Swiss-cheese defense where the highest leverage is the first slice). For the RTL/DV engineer, the catalog says the cheapest quality is upstream; for the DFT engineer, it maps how a mistake propagates across phases; for the STA engineer, it anchors multi-mode signoff (12.5); for the test engineer, it codifies the debug discipline (Ch13); and for management, it's a gate that protects quality, yield, and schedule by catching mistakes before silicon. It also bridges to Chapter 14: the case studies take the whole method — end to end, from a single flip-flop to a small IP — and apply it, which is exactly where this catalog earns its keep as the checklist you run at each signoff. The final word of the debug chapter is its first word, now proven across every phase: a failure is data, DFT is a chain, and the cheapest, most durable fix is upstream at the root cause — with the catalog as the gate that keeps the lesson from being re-learned.

13. Engineering Checklist

• Ran the per-phase catalog as a signoff-review gate — RTL → scan/DRC → ATPG → compression → timing → debug.
• Traced failures to a root-cause class (unmasked X / unconstrained mode / skipped structural check / verdict-not-data) and fixed the class.
• Fixed upstream, not at the tester — the cheapest, most durable fix is at the source.
• Added a checklist gate + lessons-learned entry after each bug so it can't recur (and logged it in BUG_LOG).
• Kept the debug method as the safety net — the plan is upstream prevention.

14. Try Yourself

1. Group the recurring DFT mistakes by phase (A–F) and give one symptom and avoid for each.
2. Trace one mistake (e.g. an unmasked X) through the chain from RTL to a silicon escape — and where it's cheapest to fix.
3. Name the four root-cause classes and show how each drives several symptoms.
4. Explain the meta-lesson: DFT is a chain, cost rises downstream, fix upstream — and why the debug method is a safety net, not a plan.
5. Write three checklist-gate rules you'd add to a signoff review to stop the top mistakes recurring.

The catalog is tool-neutral and consolidates the whole track; it's a review checklist, not a tool output. No paid tool required to run the gate.

15. Interview Perspective

• Weak: "Common DFT mistakes are things like low coverage and chain failures."
• Good: "Mistakes happen at every phase — uninitialized state, unmasked X, unconstrained modes — and you fix them with reviews and checklists."
• Senior: "DFT is a chain from RTL to silicon, so I think in phases — RTL, scan/DRC, ATPG/coverage, compression, timing, debug — each with recurring mistakes, a symptom, and an avoid. The key insight is cost rises downstream: the same mistake (an unmasked X) is cheap in RTL and catastrophic as a field escape, so I fix upstream, and I treat the debug method (Ch13) as the safety net, not the plan. And the many symptoms trace to a few root causes — unmasked X, unconstrained mode, skipped structural check, failure-as-verdict — so I fix the class, not each symptom, and add a checklist gate after every bug so it can't recur. The catalog is my signoff-review checklist — it's how hard-won debug lessons stop being re-learned."

16. Interview / Review Questions

17. Key Takeaways

• The catalog consolidates the whole track (Ch1–13) into phase-grouped mistakes — (A) RTL, (B) scan/DRC, (C) ATPG/coverage, (D) compression, (E) timing/SDC, (F) debug — each with a symptom / why / avoid, doubling as a signoff-review checklist.
• DFT is a chain from RTL to silicon, and cost rises downstream — the same mistake is cheapest to fix upstream and most expensive as a field escape; so fix upstream, and treat the debug method (Ch13) as the safety net, not the plan.
• The many symptoms trace to a few root-cause classes: an unmasked X, an unconstrained mode, a skipped structural check, or a failure treated as a verdict — fix the class at its source, not each symptom.
• Add a checklist gate after every bug — convert each lesson into a rule that can't recur (plus a lessons-learned log and BUG_LOG entry); the catalog is the gate.
• A recurring failure is almost always an upstream mistake every downstream phase missed — the Swiss-cheese holes lining up; trace it backward to the root cause and fix at the source. Next: Chapter 14 — apply the whole method in end-to-end case studies.

18. Quick Revision

Common DFT mistakes & how to avoid them (Ch13 closer). A CATALOG of recurring mistakes across the whole track, grouped by PHASE, each with symptom/why/avoid — a signoff-review checklist. (A) RTL: uninit state (X source), non-scan-safe clocks/latches, no isolation, unplanned chains. (B) scan/DRC: ignored warnings, uncontrolled shift clocks/resets, no lock-ups, poor balance. (C) ATPG/coverage: chase 100% blindly, test-vs-fault confusion, unmasked X, coverage-as-quality-proof. (D) compression: over-compress, no diagnostic mode, unbounded X (aliasing). (E) timing/SDC: functional-only constraints, no shift-hold, no at-speed, unconstrained SE → functional-clean-but-test-broken. (F) debug: failure-as-verdict, patterns-before-flush, miscompare-before-expected, scrap-on-X, dirty-datalog diagnosis, at-speed-on-first-silicon, verdict-over-environment. META: DFT is a CHAIN RTL→silicon, cost RISES downstream → FIX UPSTREAM; debug is the SAFETY NET, not the plan. Few root causes (unmasked X | unconstrained mode | skipped structural check | verdict-not-data) → many symptoms → fix the CLASS + add a checklist GATE. Next: Ch14 — end-to-end case studies.