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DFT · Chapter 5 · ATPG

Combinational vs Sequential ATPG

There are two regimes of ATPG, and the difference between them is exactly why full scan exists. Combinational ATPG assumes full scan, so every flop acts as a pseudo primary input and pseudo primary output, and each pattern is just a scan load, one capture, and an unload. The tool then solves a purely combinational problem in a single time frame, which is tractable, fast, and high-coverage, and it is the industry norm. Sequential ATPG has no full scan, so the tool must reason across many clock cycles by unrolling the circuit into time frames to justify a state and propagate a fault through it. That search space grows exponentially, giving low coverage and huge runtime, so it survives only where scan is absent. This lesson proves the value of scan from the ATPG side.

Intermediate13 min readDFTCombinational ATPGSequential ATPGFull ScanTime-Frame Expansion

Chapter 5 · Section 5.4 · ATPG

Project thread — the FSM (4.5) is full-scan, so 5.6's ATPG on it is combinational — tractable and high-coverage, exactly as this lesson argues.

1. Why Should I Learn This?

This is the ATPG-side proof of why full scan was worth its cost (3.1) — combinational vs sequential ATPG is night and day.

  • Combinational ATPG (full scan): flops as pseudo-PI/PO, one capture → combinational, tractable, high coverage, the norm.
  • Sequential ATPG (no scan): time-frame expansion over many cycles → exponential → low coverage, aborts.
  • Partial scan: bounded sequential depth — a middle ground (less area, harder ATPG).
  • Full scan + combinational ATPG won on coverage and runtime — decisively.

2. Real Silicon Story — the legacy block that ran ATPG for a week

A team inherited a non-scan legacy block and ran sequential ATPG on it. The run went for days, coverage crawled to a mediocre number, and thousands of faults came back aborted. The instinct: run it even longer.

Longer didn't help — sequential ATPG's search is exponential in sequence length, so more runtime bought almost no coverage. The tool was unrolling the circuit over many time frames and drowning in an explosive search to justify deep states and propagate through cycles.

The fix was structural: make the block full scan. The same faults then fell to combinational ATPG — flops as pseudo-PI/PO, one capture per pattern — reaching high coverage in minutes. Where full scan was truly impossible (a small analog interface), they accepted lower coverage and added insurance (SLT/burn-in, 1.3). Lesson: sequential ATPG's wall is fundamental; you don't beat it with runtime, you beat it with scan — which is the whole reason full scan is standard.

3. Factory Perspective — the two regimes through each lens

  • What the test engineer sees: full-scan → combinational ATPG (fast, high coverage) vs non-scan → sequential ATPG (slow, low coverage, aborts) — a stark difference in coverage and runtime.
  • What the yield engineer sees: that non-scan blocks carry lower coverage → more escapes there → a DPPM hot-spot needing insurance (1.5).
  • What the RTL/DV engineer sees: that full scan (scan-ready RTL, Ch4) is what makes ATPG tractable — non-scan legacy IP is a coverage liability.
  • What management cares about: that full scan's area cost buys dramatically better coverage/runtime — the standard for good reason; sequential ATPG is a last resort with real DPPM risk.

4. Concept — one time frame vs many

Combinational ATPG (full scan — the norm):

  • Full scan makes every flop a pseudo-PI (its output) and pseudo-PO (its input) — you load and read all state via the chain (3.1).
  • Each pattern = scan load → one capture → scan unload, so ATPG solves the combinational logic between flops in one time frame.
  • Tractable (well-understood combinational search, 5.2), fast, high coverage — the industry standard.
  • At-speed (2.3): a launch + capture pair (two frames), but both states are scan-fixed, so reasoning stays essentially combinational per capture.

Sequential ATPG (no/limited scan):

  • Without scan, ATPG can't set/observe state directly, so it must reason over time.
  • Time-frame expansion: unroll the circuit into a sequence of copies (one per cycle), wiring each frame's flop outputs to the next frame's inputs — then treat the whole unrolled circuit as one combinational problem.
  • To justify a deep state or propagate a fault, ATPG may need many frames → the search is exponential in sequence length → low coverage, huge runtime, many aborts.
  • Used only where scan is absent/limited: legacy, some analog/memory interfaces, non-scan IP.

Partial scan (the middle ground):

  • Scan some flops → the sequential depth between scan cells is bounded → sequential ATPG over a few frames instead of many.
  • Less area than full scan, but a harder ATPG problem and lower coverage — usually not worth it vs full scan.

Why full scan won:

  • The coverage + runtime gap between combinational and sequential ATPG is enormous; the area cost of full scan (3.1) is small by comparison — so full scan + combinational ATPG became the default methodology.
Combinational ATPG solves one time frame with flops as pseudo-PI/PO; sequential ATPG unrolls the circuit across many time frames with exponential searchCOMBINATIONAL (fullscan)flops = pseudo-PI/PO; load→ 1 capture → unloadOne time frametractable, fast, highcoverage — the NORMSEQUENTIAL (no scan)can't set/observe statedirectlyUnroll N time framesexponential in N → lowcoverage, aborts12
Figure 1 — combinational vs sequential ATPG (representative). COMBINATIONAL (full scan): every flop is a pseudo-PI (output) and pseudo-PO (input) via the scan chain, so each pattern is LOAD -> ONE capture -> UNLOAD and ATPG solves ONE time frame of combinational logic -> tractable, high coverage. SEQUENTIAL (no scan): ATPG must UNROLL the circuit into N TIME FRAMES (frame k's flop outputs feed frame k+1's inputs) to justify a state and propagate over time -> the search is EXPONENTIAL in N -> low coverage, huge runtime, aborts. Scan turns N frames into 1 -- the whole reason full scan is standard.

5. Mental Model — a save/load game vs a no-save speedrun

Recall 3.1's game analogy — here it decides the whole difficulty of the ATPG problem.

  • Combinational ATPG (full scan) is a game with save/load: to test 'from level 47,' you load level 47 instantly, make one move, and read the result. Testing any position is a one-move problem — easy and fast.
  • Sequential ATPG (no scan) is a no-save speedrun: to test 'from level 47,' you must play there from the start through many exact moves, and to see the outcome you must play forward to something visible. The number of possible move sequences grows explosively with length — so most deep positions are effectively untestable in reasonable time.
  • Partial scan is a game with checkpoints every few levels: better than no-save (you only replay a short stretch), but still harder than full save/load.
  • Unrolling time frames is literally writing out every move of the speedrun as one giant puzzle — it works for short runs and explodes for long ones.

Save/load (full scan) turns an impossible speedrun into a one-move test — the concrete reason full scan is standard.

6. Working Example — coverage and runtime, side by side

Compare the regimes on the same logic:

Azvya Education Pvt. Ltd.VLSI Mentor
Snippet
# Combinational vs sequential ATPG — REPRESENTATIVE, SIMPLIFIED, tool-neutral (same block):
                          FULL SCAN (combinational)     NO SCAN (sequential)
  Flops                   pseudo-PI/PO (load+read)      hidden state (reach over cycles)
  Per pattern             load -> 1 capture -> unload   justify/propagate over MANY cycles
  ATPG problem            1 time frame (combinational)  N time frames (unrolled) -> exponential
  Coverage (typical)      HIGH (~95-99%+, repr.)        LOW (often far less) + many ABORTS
  Runtime                 minutes                       hours-to-days
  Use when                DEFAULT (industry norm)       scan absent (legacy/analog/memory IF)
# Same faults, same tool -- SCAN changes the PROBLEM CLASS (5.2/3.1). That gap is why full scan won.
Azvya Education Pvt. Ltd.VLSI Mentor
Snippet
# Partial scan (middle ground) — REPRESENTATIVE:
  Scan SOME flops -> sequential depth between scan cells BOUNDED (e.g. <= 2-3 frames)
  -> sequential ATPG over a FEW frames (tractable-ish) ; less area than full scan
  -> but HARDER ATPG + LOWER coverage than full scan -> usually not worth it vs full scan.
# At-speed (2.3): launch+capture = 2 frames, but BOTH scan-fixed -> still ~combinational reasoning per capture.

7. Industry Flow — scan decides the ATPG regime

The scan decision (Ch3–4) determines which ATPG regime — and its coverage/runtime — you get:

Full scan leads to combinational ATPG with high coverage; no scan leads to sequential ATPG with exponential search and low coverageScan choice → ATPG regime → coverage/runtimeScan choice → ATPG regime → coverage/runtime1Full scan (Ch3–4)flops controllable/observable2Combinational ATPG1 capture → tractable, high coverage, minutes3No / partial scanlegacy / analog / memory IF4Sequential ATPGtime-frame expansion → exponential, low coverage5Coverage closure (Ch6)non-scan blocks cap coverage → insurance (1.5)
Figure 2 — scan choice determines the ATPG regime (representative). FULL SCAN -> COMBINATIONAL ATPG (one time frame, flops pseudo-PI/PO) -> tractable, high coverage, minutes -> the norm, feeding coverage closure (Ch6). NO/limited scan -> SEQUENTIAL ATPG (time-frame expansion over N cycles) -> exponential, low coverage, aborts, days -> only for legacy/analog/memory interfaces, and a DPPM liability needing insurance (1.5). PARTIAL SCAN sits between. The whole point of Ch3-4 full scan is to land you in the combinational regime.

8. Debugging Session — sequential ATPG stuck at low coverage

1

A non-scan (or partial-scan) block runs sequential ATPG for days at low coverage with many aborts, and the team wants to run it even longer; the cause is the exponential time-frame-expansion search, which runtime cannot overcome, so the real fix is to make the block full scan (combinational ATPG) or accept lower coverage with insurance -- not more sequential runtime

SEQUENTIAL ATPG IS EXPONENTIAL — FIX WITH FULL SCAN, NOT MORE RUNTIME
Symptom

A non-scan (or partial-scan) block runs sequential ATPG for days, reaches low coverage with many aborts, and the plan is to run it even longer to 'get there.'

Root Cause

Sequential ATPG's search is exponential in the number of time frames it must unroll, so runtime cannot overcome the wall — the problem is the class of the problem, not the amount of compute. Without full scan, ATPG can't load or observe state directly, so to excite a fault on deep state it must justify that state across many clock cycles, and to observe the effect it must propagate through more cycles to an output. It models this by unrolling the circuit into a time-frame-expanded copy for each cycle and searching the whole thing — but the number of possible cycle-by-cycle assignments grows exponentially with the sequence length, so the search aborts on most deep-state faults regardless of effort. Adding runtime buys negligible coverage because you're fighting an exponential; the tool isn't merely slow, the problem is intractable at this depth. This is the same sequential wall as 3.1, now seen from inside the ATPG engine. Partial scan helps a little (bounds the depth) but still leaves a hard sequential problem and lower coverage than full scan.

Fix

Make the block full scan so ATPG becomes combinational — or, where full scan is truly impossible, accept the lower coverage and add insurance, but do not throw runtime at sequential ATPG. Convert the block to full scan (scan-ready RTL + insertion, Ch4): every flop becomes a pseudo-PI/PO, each pattern collapses to load → one capture → unload, and ATPG solves a single-time-frame combinational problem (5.2/5.3) — reaching high coverage in minutes on the same faults. Where full scan is genuinely infeasible (e.g. a small analog/memory interface or hard non-scan IP), accept the lower coverage on that block and add insurance — SLT/burn-in (1.3) and, for memories, MBIST (Chapter 8) — rather than pretending sequential ATPG will close it. The principle to lock in: combinational ATPG assumes full scan (flops as pseudo-PI/PO, one capture per pattern) and solves a tractable single-time-frame problem with high coverage, while sequential ATPG (no full scan) must unroll the circuit across many time frames — an exponential search that yields low coverage, huge runtime, and aborts — so a low-coverage, days-long sequential run is fixed by adopting full scan (which changes the problem class), never by adding runtime; full scan won precisely because its area cost is small next to the coverage and runtime it buys. (Full scan is Chapter 3; scan insertion is Chapter 4; memory test is Chapter 8; insurance/DPPM is 1.5.)

9. Common Mistakes

  • Throwing runtime at sequential ATPG. The search is exponential — runtime can't beat it; use full scan.
  • Choosing partial scan to save area by default. It's harder ATPG and lower coverage — full scan usually wins.
  • Assuming non-scan IP is 'fine.' It's a coverage/DPPM liability — insure or redesign (1.5).
  • Forgetting at-speed is still ~combinational. A launch+capture pair with scan-fixed states isn't sequential ATPG.
  • Ignoring the coverage/runtime gap. It's the whole justification for full scan's area cost (3.1).

10. Industry Best Practices

  • Default to full scan → combinational ATPG — tractable, high coverage, fast.
  • Reserve sequential ATPG for truly non-scan blocks (legacy/analog/memory IF).
  • Insure non-scan coverage gaps — SLT/burn-in, MBIST (Ch8), per DPPM (1.5).
  • Weigh partial scan carefully — the ATPG/coverage cost often outweighs the area saving.
  • Quantify comb-vs-seq coverage/runtime to justify the scan decision.

11. Senior Engineer Thinking

  • Beginner: "Sequential ATPG is stuck low — run it over the weekend."
  • Senior: "Sequential ATPG is exponential in time frames — the weekend won't move it. I make the block full scan so ATPG is combinational (flops pseudo-PI/PO, one capture) — high coverage in minutes on the same faults. Where full scan is impossible, I accept lower coverage and insure it (SLT/MBIST). Full scan changes the problem class; runtime doesn't."

The senior fixes low sequential coverage with full scan (or insurance), never with runtime.

12. Silicon Impact

Combinational vs sequential ATPG is the quantitative proof of Chapter 3's central claim, and it settles a methodology question the whole industry has already answered. With full scan, ATPG solves a single-time-frame combinational problem — flops as pseudo-PI/PO, one capture per pattern — which is tractable, fast, and high-coverage, and is therefore the default. Without it, ATPG must unroll the circuit across many time frames and fight a search that is exponential in sequence length, delivering low coverage, days of runtime, and aborts — a wall that no amount of compute overcomes, because the problem class, not the machine, is the limit. That gap — minutes and high coverage vs days and low coverage — is so large that the area cost of full scan (3.1) is a rounding error by comparison, which is exactly why full scan + combinational ATPG became standard. The practical consequences are sharp: sequential ATPG is a last resort for truly non-scan logic (legacy, analog/memory interfaces, hard IP), and any such block is a coverage and DPPM liability (1.5) that must be insured (SLT/burn-in, MBIST — Chapter 8) or redesigned to full scan, never 'fixed' by longer runs. Partial scan occasionally has a niche, but its harder ATPG and lower coverage usually don't justify the area it saves. For the RTL/DV engineer, this is the hard number behind 'design for scan' (Chapter 4): full-scan, scan-ready logic is what puts you in the tractable combinational regime — and it's why the FSM of 4.5, being full scan, lets 5.6's ATPG run combinationally to high coverage in minutes.

13. Engineering Checklist

  • Chose full scan → combinational ATPG as the default.
  • Reserved sequential ATPG for truly non-scan blocks only.
  • Insured non-scan coverage gaps (SLT/burn-in, MBIST) per DPPM (1.5).
  • Evaluated partial scan on coverage/ATPG cost, not just area.
  • Did not attempt to close low sequential coverage with runtime — used scan.

14. Try Yourself

  1. Explain why full scan makes each pattern a load → one capture → unload (flops as pseudo-PI/PO).
  2. Draw time-frame expansion: unroll a small sequential circuit over 3 cycles; note the growth.
  3. Argue why sequential ATPG's search is exponential in the number of frames.
  4. Compare coverage/runtime for the same block, full-scan vs non-scan; state which is the norm and why.
  5. Decide what to do with a non-scan analog interface block (accept + insure, not more runtime).

The comparison is tool-neutral. Real coverage/runtime come from ATPG runs in each mode. No paid tool required to reason about the regimes.

15. Interview Perspective

  • Weak: "Combinational ATPG is for combinational logic; sequential is for sequential logic."
  • Good: "With full scan, ATPG treats flops as pseudo-PI/PO and solves one combinational frame; without scan it reasons over many cycles."
  • Senior: "Combinational ATPG assumes full scan, so every flop is a pseudo-PI/PO and each pattern is load → one capture → unload — ATPG solves a single-time-frame combinational problem: tractable, fast, high coverage, the norm. Sequential ATPG (no full scan) must unroll the circuit into many time frames — time-frame expansion — to justify a state and propagate over time, and the search is exponential in sequence length, so it gives low coverage, huge runtime, aborts, and survives only for non-scan legacy/analog/memory logic. Partial scan bounds the depth as a middle ground but is harder ATPG with lower coverage than full scan. At-speed adds a launch+capture pair but stays ~combinational because scan fixes both states. Full scan won because the coverage/runtime gap dwarfs its area cost."

16. Interview / Review Questions

17. Key Takeaways

  • Combinational ATPG assumes full scan: every flop is a pseudo-PI/PO, each pattern is load → one capture → unload, and ATPG solves a single-time-frame combinational problem — tractable, fast, high-coverage, the industry norm, and exactly what full scan buys.
  • Sequential ATPG (no full scan) must unroll the circuit across many time frames (time-frame expansion) to justify a state and propagate over time — an exponential search giving low coverage, huge runtime, and aborts.
  • Sequential ATPG survives only where scan is absent/limited (legacy, analog/memory interfaces, non-scan IP); its low coverage is a DPPM liability fixed by full scan or insurance (SLT/MBIST), never by more runtime.
  • Partial scan bounds sequential depth as a middle ground — less area but harder ATPG and lower coverage than full scan, usually not worth it.
  • The coverage/runtime gap between the regimes is so large that full scan's area cost (3.1) is worth it — this is the ATPG-side proof that full scan + combinational ATPG is standard; at-speed (2.3) adds a launch+capture pair but stays ~combinational because scan fixes both states. Next: 5.5 — untestable, aborted & redundant faults.

18. Quick Revision

Combinational vs sequential ATPG. COMBINATIONAL (full scan): flops = pseudo-PI/PO → each pattern = load → ONE capture → unload → one time frame of combinational logic → tractable, fast, HIGH coverage → the NORM (what full scan buys). SEQUENTIAL (no scan): time-frame expansion — unroll the circuit over N cycles to justify a state + propagate over time → exponential in N → LOW coverage, days of runtime, aborts → only for non-scan legacy/analog/memory IF. Partial scan = bounded depth middle ground (harder ATPG, lower coverage). Fix low sequential coverage with FULL SCAN (changes the problem class) or insurance — NOT runtime. At-speed = launch+capture pair, still ~combinational (both states scan-fixed). Next: 5.5 — untestable, aborted & redundant faults.