GLS · Chapter 6 · X-Propagation
X-Pessimism vs X-Optimism
A simulation can be wrong about an unknown in two opposite ways, and understanding both is the core of X-propagation. X-pessimism is when a model emits an unknown even though real hardware would resolve to a definite value. It is safe but noisy, producing false unknowns that waste debugging time. X-optimism is the opposite: a model hides an unknown that genuine uncertainty should have produced, which is dangerous because it can mask a real bug. The tendency matters. RTL tends to be X-optimistic, while gate-level cell models tend to be X-pessimistic, and that asymmetry is exactly why a bug invisible in RTL can appear in gate-level simulation. This lesson explains both behaviors and the anchoring fact that neither is literal silicon truth, since real hardware resolves electrically.
Foundation12 min readGLSX-PessimismX-OptimismUDPModelling
Chapter 6 · Section 6.2 · X-Propagation
Project thread — the FSM X from 5.5: is it a real bug (RTL optimism hid it) or gate pessimism (a false X)? This lesson gives the framework; 6.6 makes the call.
1. Why Should I Learn This?
Every gate-level X forces the same judgement: real bug, or pessimism? Getting it wrong is costly both ways.
- X-pessimism → false
Xs; treat them all as bugs and you burn days. - X-optimism → hidden
Xs; trust RTL alone and a real bug escapes. - RTL optimistic, gate pessimistic → the reason GLS finds what RTL misses (6.4).
This is the interpretive lens for the whole chapter (and for the FSM X in 6.6).
2. Real Silicon Story — the RTL "pass" that optimism produced
A design passed RTL simulation cleanly. Gate-level simulation then showed X propagating from a mux — filed as "gate-level pessimism, ignore."
It was not pessimism. The mux select was genuinely uninitialized. RTL's if (sel) ... else ... was X-optimistic — with sel = X it silently took the else branch, producing a definite value and hiding the uninitialized select. The gate-level mux was X-pessimistic — it propagated X, correctly flagging the real problem. Dismissing it as pessimism nearly let an uninitialized-control bug through.
Lesson: an X that appears in GLS but not RTL is often a real bug that RTL's optimism hid — not gate pessimism. Judge each on its source, not on which sim shows it.
3. Concept — the two failure modes, and the RTL/gate asymmetry
X-pessimism (safe but noisy):
- Model emits
Xwhen real HW would resolve to a definite value. - Example: a UDP outputs
Xfor an ambiguous input combination silicon would settle (2.3). - Cost: false
Xs → wasted debug, over-constrained analysis.
X-optimism (dangerous):
- Model hides an
Xthat real uncertainty should produce. - Example:
if (sel) a; else b;withsel = Xtakeselse→ a definite value, masking the unknown. - Cost: missed bugs → real uninitialized/uncertain logic looks fine.
The asymmetry (why it matters):
- RTL tends X-optimistic — behavioural
if/case/?:resolve unknowns to a branch. - Gate cell models tend X-pessimistic — UDPs propagate
X(2.3). - So a bug hidden by RTL optimism can be exposed by gate pessimism (6.4).
The anchor:
- Neither is silicon truth. Real HW resolves electrically to some level;
Xand its handling are modelling choices. - Goal: catch real
X(don't dismiss it) while managing pessimism (don't drown in falseX, 6.5).
4. Mental Model — the over-cautious clerk vs the guesser
Two clerks handle an unclear order.
- The pessimist stamps everything uncertain as "UNKNOWN" — never wrong, but floods you with flags, some for orders that were actually fine (false
X). That's the gate UDP. - The optimist guesses an answer whenever unsure and moves on — tidy output, but a genuinely bad order slips through labelled "fine" (hidden
X). That's RTL. - Reality (silicon) always resolves to a definite outcome — but not necessarily the optimist's guess.
You want the pessimist's honesty (see the uncertainty) without drowning in its noise — that balance is X-propagation practice (6.5).
5. Working Example — the same unknown, optimistic vs pessimistic
The same mux, two behaviours on an unknown select:
// X-OPTIMISTIC (RTL behavioural): if/else picks a branch on X -> HIDES the unknown
assign y_rtl = sel ? a : b; // sel = X -> often resolves to b -> DEFINITE (masks bad sel)
// X-PESSIMISTIC (gate UDP): propagates X when sel unknown and a != b -> EXPOSES it
// MUX2_udp row: a=0 b=1 sel=x : x (2.3) -> y_gate = X (flags the uninitialized select)Practical context (representative, tool-neutral):
# Triage an X that appears in GLS but not RTL:
# 1) find the X SOURCE (6.1) — uninitialized? contention? model?
# 2) is the source a REAL unknown (bad reset, uninit control)? -> RTL OPTIMISM hid a real bug
# 3) or would real HW resolve here (ambiguous UDP input)? -> gate PESSIMISM (false X)
# Default: investigate as REAL first; prove pessimism, don't assume it.Same select, optimistic vs pessimistic, as a real waveform:
Uninitialized select: RTL (optimistic) shows a definite output; gate (pessimistic) shows X
8 cycles6. Debugging Session — is the GLS-only X real or pessimism?
An X appears in gate-level sim but not in RTL and is dismissed as pessimism, but it is a real uninitialized-select bug that RTL's X-optimism hid — triage by finding the X source, not by which simulation shows it
GLS-ONLY X: TRIAGE SOURCE, DON'T ASSUME PESSIMISMAn X propagates from a mux in gate-level simulation. RTL simulation of the same scenario is clean. The X is filed as "gate-level pessimism."
Likely a real bug hidden by RTL optimism, not gate pessimism. The mux select is genuinely uninitialized (X). RTL's behavioural sel ? a : b is X-optimistic — with sel = X it picks a branch and outputs a definite value, masking the bad select. The gate mux is X-pessimistic — its UDP propagates X when the select is unknown and the inputs differ (2.3), correctly flagging the uninitialized control. So the RTL "pass" was the misleading result, and the gate X was honest. Dismissing it as pessimism without checking the source risks letting a real uninitialized-control bug through.
Triage by source (6.1), not by which sim shows the X. Trace the gate X upstream: if it comes from a real unknown (uninitialized select, bad reset, contention), it is a real bug RTL optimism hid — fix the source (initialize/reset the control). Only if real hardware would genuinely resolve the ambiguity (e.g. a UDP X row for inputs silicon settles) is it pessimism — then manage it (6.5), don't dismiss it blindly. Default: investigate a GLS-only X as real first; prove pessimism, don't assume it. The lesson: X-optimism (RTL) hides real X; X-pessimism (gate) emits false X — a GLS-only X is often a real bug RTL hid, so judge by the X source, not the simulation. (Neither is silicon truth; X is a modelling value, and GLS stays dynamic — STA signs off, 0.3.)
7. Common Mistakes
- Dismissing every GLS-only
Xas pessimism. Often a real bug RTL optimism hid. - Trusting an RTL "pass" on unknowns. RTL
if/casecan hideX(optimism). - Treating every gate
Xas a real bug. UDP pessimism produces falseXtoo (2.3). - Calling either model "silicon truth." Both are modelling; silicon resolves electrically.
- Not tracing the
Xsource. Source (6.1) is what settles real-vs-pessimism.
8. Industry Best Practices
- Triage GLS-only
Xby source — real unknown vs genuinely-resolvable. - Distrust RTL optimism on unknown selects/conditions — use xprop (6.5) to shift-left.
- Manage, don't dismiss, pessimism — reduce it deliberately (6.5), not by ignoring
X. - Default to "real first" — prove pessimism before waiving an
X. - Remember
Xis a model value — a flag, not a silicon voltage.
Senior Engineer Thinking
- Beginner: "GLS shows
Xbut RTL is clean — must be gate pessimism, ignore it." - Senior: "RTL is optimistic — it hides
Xon unknown selects. Where does this gateXcome from? If the select is really uninitialized, RTL lied and the gate is right. I prove pessimism; I don't assume it."
The senior treats a GLS-only X as probably real until the source proves pessimism.
Silicon Impact
The optimism/pessimism asymmetry is why gate-level simulation catches bugs RTL misses — and mishandling it cuts both ways at tape-out. Dismiss a real X as "pessimism," and an uninitialized-control or bad-reset bug reaches silicon, where it manifests as a power-up-dependent, intermittent failure (0.3) — the exact class RTL optimism is prone to hide. Conversely, treat unavoidable UDP pessimism as all-real and you drown real bugs in false X and may waive checks to cope. The discipline — judge each X by source, default to real, manage pessimism deliberately (6.5) — is what makes GLS's X findings trustworthy and protective.
Engineering Checklist
- For each GLS-only
X, traced its source (6.1) before judging. - Defaulted to "real bug" until pessimism is proven.
- Recognised RTL optimism on unknown selects/conditions.
- Managed pessimism deliberately (6.5), not by ignoring
X. - Treated
Xas a modelling flag, not silicon truth.
Try Yourself
- Simulate a mux with an uninitialized select in RTL (
sel ? a : b) — the output is a definite value (optimism). - Observe: RTL hides the bad select.
- Change: run the gate-level mux (UDP) with the same uninitialized select.
- Expect: the gate output is
X(pessimism correctly flagging a real bug). Then initializeseland confirm both agree — proving theXwas real, not noise.
Any free Verilog simulator shows the RTL-vs-gate divergence with a UDP mux. No paid tool required.
Interview Perspective
- Weak: "Gate-level
Xis just pessimism you can ignore." - Good: "X-pessimism emits
Xwhere hardware resolves (noisy); X-optimism hides a realX(dangerous). RTL tends optimistic, gate models pessimistic." - Senior: "That asymmetry is why GLS catches bugs RTL hides — RTL
if/caseresolve unknowns to a branch, gate UDPs propagateX. So a GLS-onlyXis often a real bug RTL optimism masked. I triage by source, default to real, and manage pessimism deliberately. Neither model is silicon truth —Xis a flag."
9. Interview / Review Questions
10. Key Takeaways
- X-pessimism: a model emits
Xwhere real hardware would resolve to a definite value — safe but noisy (falseX, wasted debug); gate-level UDPs tend pessimistic (2.3). - X-optimism: a model hides an
Xthat real uncertainty should produce — dangerous (masks bugs); RTL tends optimistic (if/case/?:pick a branch onX). - The asymmetry (RTL optimistic, gate pessimistic) is why GLS exposes bugs RTL hides (6.4).
- Neither is silicon truth — real hardware resolves electrically;
Xand its handling are modelling behaviours. - Triage a GLS-only
Xby its source (6.1), defaulting to real — prove pessimism, don't assume it; then manage pessimism deliberately (6.5). Next: 6.3 — how X flows through muxes, flops & latches.
Quick Revision
X-pessimism = emits
Xwhere HW resolves (safe, noisy; gate UDPs). X-optimism = hides a realX(dangerous; RTLif/case). Asymmetry (RTL optimistic, gate pessimistic) = why GLS finds bugs RTL hides. Neither is silicon truth. A GLS-onlyXis often real — triage by source (6.1), default to real, prove pessimism. Next: 6.3 — X through muxes, flops & latches.