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DFT · Chapter 7 · Test Compression

EDT-Style Scan Compression

This lesson makes scan compression concrete with a representative EDT-style scheme, kept tool-neutral so you learn the idea rather than one vendor's internals. The decompressor is a ring generator, an LFSR-like linear state machine fed by the scan-in pins every shift cycle, followed by a phase shifter that spreads its state across many internal chains. Because the network is linear, each required care bit becomes a linear equation, and compression-aware ATPG solves that system for the input stream that produces every care bit at once, the embedded-deterministic idea. On the output side, an XOR-tree compactor with a mask register gates off chains carrying unknown values so they cannot corrupt the compacted response. You will see how ratios of ten to a hundred times are bounded by care-bit density.

Advanced14 min readDFTEDTRing GeneratorLinear SolveX-Masking

Chapter 7 · Section 7.3 · Test Compression

Project thread — the mini-SoC's chains are driven EDT-style (ring generator + phase shifter) with a masking XOR compactor; 7.4/7.5 handle the coverage/X trade-offs.

1. Why Should I Learn This?

EDT-style is the concrete, dominant realization of 7.2's blocks — and the linear-solve view explains exactly how patterns are delivered and why the ratio is bounded.

  • Decompressor = ring generator (LFSR-like) + phase shifter, fed each cycle from the scan-in pins.
  • Each care bit = a linear equation over GF(2); compression-aware ATPG solves for the input stream (embedded deterministic).
  • Compactor = XOR tree + mask register (gates off X-carrying chains before the XOR).
  • Over-constrained (too many care bits) → split pattern or drop (7.2/7.4); ratios 10–100×.

2. Real Silicon Story — the hard fault that needed two compressed patterns

A block matched its uncompressed coverage under EDT-style compression — except one hard fault that was detected uncompressed came back needing extra effort compressed. The team worried compression had a fundamental hole.

It didn't. That fault was hard to control/observe (5.2), so its detecting pattern had an unusually dense set of care bits. Compressed, those care bits formed a linear system over the few input variables that was over-constrained — the ring generator couldn't produce all of them in one pattern. Compression-aware ATPG did the sensible thing: it split the requirement across two compressed patterns (each satisfying a solvable subset), and the fault was detected — at the cost of one extra pattern. Alternatively, a test point (6.4) would have thinned the care bits so one pattern sufficed.

Lesson: EDT-style compression delivers deterministic patterns by solving a linear system for the input stream; a care-bit-dense pattern can over-constrain that system, so ATPG splits it (or you spread care bits with a test point). It's the linear-solve limit, working exactly as designed — not a coverage hole.

3. Factory Perspective — EDT-style through each lens

  • What the test engineer sees: a compressed pattern = an input stream + mask + expected compacted output; the ATE streams few bits/cycle and compares few bits — dramatically less data/time (1.4).
  • What the yield engineer sees: that diagnosis works back through the compactor/mask (which chain/cycle) and the linear decompressor — mapping a compacted fail to a fault.
  • What the RTL/DV engineer sees: that hard faults (dense care bits) may cost extra compressed patterns — a cue for test points (6.4) — and that X-sources drive the mask register usage (7.4).
  • What management cares about: that EDT-style delivers the 10–100× test-cost win (1.4) deterministically (coverage preserved), with the ratio a care-bit-bounded dial (7.2/7.4).

4. Concept — the linear machine and the solve

The decompressor (ring generator + phase shifter):

  • Ring generator: an LFSR-like linear state machine, fed by the scan-in pins each shift cycle — a continuous injection, so the compressed data is a stream, not a single seed.
  • Phase shifter: an XOR network that combines the ring generator's state bits to drive the many chains with decorrelated bit sequences (so chains aren't trivially identical).
  • Net: each internal-chain bit at each cycle is a fixed XOR combination of the injected input bits (a linear function).

Care bits as linear equations (the heart):

  • A care bit must equal a specific value (0 or 1). Since each chain bit is a linear XOR of the input stream, each care bit is a linear equation over GF(2) in the input-stream variables.
  • A pattern's care bits → a system of linear equations.

Compression-aware ATPG solves the system (embedded deterministic):

  • ATPG solves the linear system for the input stream that produces all the care bits simultaneously — delivering the exact deterministic pattern through the compressed channel (the 'embedded deterministic' name).
  • Solvable → pattern delivered. Over-constrained (more independent care bits than input variables) → split into multiple patterns or drop the fault (7.2/7.4).

The compactor (XOR tree + mask register):

  • XOR tree: merges the many chain outputs to few scan-out pins (spatial compaction).
  • Mask register: mask bits gate off chains carrying X before the XOR, so an X doesn't corrupt the compacted output — X-masking (7.4). The masked, compacted response is compared to golden.

Ratios & the limit:

  • Typically 10–100× (representative), always bounded by care-bit density (7.2): higher ratio → fewer input variables → fewer satisfiable care bits per pattern.
Scan-in feeds a ring generator and phase shifter driving many chains; care bits are linear equations solved by ATPG; an XOR-tree compactor with a mask register merges outputsScan-in (per cycle)compressed input streamRING GENERATOR(LFSR-like)linear state machinePHASE SHIFTER (XOR)spread → many decorrelatedchainsCare bits = lineareqns (GF(2))ATPG SOLVES for the inputstreamXOR-tree COMPACTOR +MASKmerge chains; mask gatesoff XScan-out (compacted)few bits → compare golden12
Figure 1 - an EDT-style compression datapath (representative, tool-neutral). SCAN-IN pins feed a RING GENERATOR (LFSR-like linear state machine) EACH cycle; a PHASE SHIFTER (XOR network) spreads its state across MANY short chains with decorrelated sequences. Because the network is LINEAR, each CARE bit is a linear equation over GF(2) in the input-stream bits -- compression-aware ATPG SOLVES the system for the input stream that produces all care bits (embedded deterministic). After capture, an XOR-TREE COMPACTOR merges the chains to few SCAN-OUT pins, with a MASK REGISTER gating off X-carrying chains before the XOR (X-masking, 7.4).

5. Mental Model — a DJ mixing a few knobs into many channels

Think of EDT-style compression as a DJ who must produce specific notes on many instruments using only a few knobs.

  • The ring generator + phase shifter is the mixing desk: a few input knobs (scan-in bits) are combined (XOR-mixed) and fanned out to many instrument channels (chains), updated every beat (each cycle).
  • Most of the time, any note is fine on most instruments (don't-cares) — the DJ only needs specific notes at a few precise moments (care bits).
  • Because the mixing is linear, each required note is a simple equation in the knob settings — so the DJ can solve for the knob sequence that hits all the required notes at once (the linear solve).
  • But if a song demands too many precise notes at once (dense care bits) for so few knobs, it's unsolvable in one pass — the DJ splits it across two takes (two patterns) or simplifies the arrangement (a test point).
  • On the way out, a mixing-down board (XOR compactor) folds many channels into a couple of speakers — but a staticky channel (an X) would ruin the mix, so the DJ mutes it first (mask register).

Few knobs, linearly mixed, solved to hit the required notes — that's EDT-style delivery of deterministic patterns.

6. Working Example — an EDT-style compressed pattern

See a compressed pattern and the linear-solve idea:

Azvya Education Pvt. Ltd.VLSI Mentor
Snippet
# EDT-style compressed pattern - REPRESENTATIVE, SIMPLIFIED, tool-neutral:
  Config: 4 scan-in pins -> ring generator (LFSR-like) -> phase shifter -> 120 chains ; XOR-tree compactor + mask -> 4 scan-out
  A pattern's CARE bits (say ~200 across the chains) -> ~200 linear equations over GF(2) in the input-stream bits
  compression-aware ATPG SOLVES for the input stream (few bits/cycle) that produces ALL care bits -> the pattern
  Delivered as:
    input_stream = <few bits per cycle, e.g. 4 bits x ~170 cycles>   # what the ATE streams to scan-in
    mask         = <which chains to gate at the compactor>           # X-masking (7.4)
    expected     = <compacted response bits at scan-out>             # golden (few bits)
# The tester loads input_stream, on-chip ring/phase-shifter decompress, capture, compactor(+mask) merges, compare expected.
Azvya Education Pvt. Ltd.VLSI Mentor
Snippet
# Over-constrained (care-bit-dense) pattern - REPRESENTATIVE:
  A HARD fault (5.2) needs ~350 INDEPENDENT care bits, but the input stream offers fewer free variables at this ratio
  -> linear system UNSOLVABLE in one pattern -> ATPG SPLITS it into 2 compressed patterns (each a solvable subset)
     -> fault DETECTED (+1 pattern) ; OR add a TEST POINT (6.4) to thin care bits -> fits in 1 pattern
# It's the LINEAR-SOLVE limit (7.2 care-bit density), working as designed -- not a coverage hole.

7. Industry Flow — compression-aware ATPG through the tester

The EDT-style workflow runs from compressed ATPG to the compacted compare:

Compression-aware ATPG solves the linear system for the input stream, the tester streams few bits, the ring generator and phase shifter decompress, capture runs, and the masked compactor merges for comparisonCompression-aware ATPG → stream → decompress → capture → compact → compareCompression-aware ATPG → stream → decompress → capture → compact → compare1Compression-aware ATPGsolve care-bit linear system → input stream + mask2ATE streams few bits/cyclecompressed stimulus3Ring gen + phase shifterdecompress across many chains4Capturelogic responds5Masked XOR compactor → comparefew bits vs golden (1.3)
Figure 2 - the EDT-style workflow (representative). COMPRESSION-AWARE ATPG generates patterns in the COMPRESSED domain -- solving the linear system (care bits) for the input STREAM, plus the MASK and expected compacted output. The ATE streams the FEW input bits per cycle -> the on-chip RING GENERATOR + PHASE SHIFTER decompress across the chains -> CAPTURE -> the XOR-tree COMPACTOR (with mask) merges to few bits -> COMPARE to golden. Determinism is preserved: the exact ATPG care bits are produced through the compressor (embedded deterministic). Care-bit-dense patterns split (7.2/7.4).

8. Debugging Session — a hard fault needs extra compressed patterns

1

Under EDT-style compression one hard fault that was detected uncompressed now needs extra effort, and the team suspects a compression coverage hole; in fact the fault's dense care bits form an over-constrained linear system for the few input-stream variables, so compression-aware ATPG splits it into two patterns (or a test point thins the care bits) -- the linear-solve limit working as designed, not a hole

DENSE CARE BITS OVER-CONSTRAIN THE LINEAR SOLVE → SPLIT OR TEST-POINT, NOT A HOLE
Symptom

Under EDT-style compression, a hard fault that was detected uncompressed now needs extra effort (an extra pattern) or briefly appears harder. The team suspects compression has a fundamental coverage hole.

Root Cause

The fault's detecting pattern has a dense set of care bits that, expressed as a linear system over the few compressed input variables, is over-constrained — so it can't be produced in a single compressed pattern, and ATPG must split it; this is the linear-solve limit, not a coverage hole. In EDT-style compression, each internal-chain bit is a fixed XOR of the input stream (the ring generator + phase shifter are linear), so every care bit is a linear equation over the input-stream variables. A pattern's care bits form a system, and ATPG solves it for the input stream. Sparse patterns (few care bits) are easily solvable — the whole point of 7.2. But a hard-to-control/observe fault (5.2) tends to need many, specific care bits, and at the chosen ratio the number of independent input-stream variables is limited, so the system can be over-constrained — there's no single input stream that satisfies all the care bits at once. That's not a coverage hole and not an ATPG weakness: it's the finite capacity of the compressed channel meeting an unusually dense pattern. ATPG's determinism is intact — it simply can't fit this one dense pattern into one compressed delivery.

Fix

Let ATPG split the dense pattern across compressed patterns, or thin its care bits with a test point (or lower the ratio) — the fault is detected, and it's the expected behavior of the linear solve. Compression-aware ATPG will partition the over-constrained care-bit set into solvable subsets, delivering the fault's requirements across two (or more) compressed patterns — the fault is detected at the cost of a few extra patterns (a small test-time increment, 1.4). If many faults are dense, thin the care-bit density: add a control/observe test point (6.4) so the hard fault needs fewer care bits and fits in one pattern, or lower the compression ratio (more input variables → larger solvable systems, 7.2/7.4). Always baseline against uncompressed coverage to confirm the compressed flow matches it. The principle to lock in: EDT-style compression uses a linear ring-generator-plus-phase-shifter decompressor so that each care bit is a linear equation and compression-aware ATPG solves for an input stream that deterministically produces all of a pattern's care bits (embedded deterministic); when a pattern's care bits are too dense for the few input variables the linear system is over-constrained, so ATPG splits the pattern (or a test point thins the care bits) — the fault is still detected, and this is the linear-solve capacity limit working as designed, never a compression coverage hole or an ATPG weakness. (The care-bit/ratio limit is 7.2; the coverage/X trade-offs are 7.4; test points are 6.4; debugging a real compression loss is 7.5.)

9. Common Mistakes

  • Calling a split pattern a 'coverage hole.' A dense care-bit pattern is split — the fault is still detected.
  • Thinking the decompressor stores a seed. EDT-style feeds the ring generator every cycle — a stream, not one seed.
  • Ignoring the linear-solve limit. Care bits are equations; too many for the input variables → over-constrained (7.2).
  • Forgetting the mask register. The compactor needs X-masking (gate X-carrying chains) or X corrupts the XOR (7.4).
  • Not baselining against uncompressed. Confirm the compressed coverage matches the uncompressed achievable.

10. Industry Best Practices

  • Use compression-aware ATPG — it solves the care-bit linear system for the input stream (embedded deterministic).
  • Let ATPG split care-bit-dense patterns; thin them with test points (6.4) where many faults are dense.
  • Configure the compactor with a mask register for X (7.4); mitigate aliasing.
  • Set the ratio to care-bit density (7.2); baseline against uncompressed coverage.
  • Treat EDT-style as representative — the linear-solve + masked-XOR ideas transfer across compression schemes.

11. Senior Engineer Thinking

  • Beginner: "This fault got harder under compression — there's a hole in the scheme."
  • Senior: "EDT-style makes each care bit a linear equation in the input stream; a dense fault's care bits over-constrain the small system, so ATPG splits it into two compressed patterns — still detected, +1 pattern. If lots of faults are dense, I thin care bits with a test point or lower the ratio. Determinism's intact — it's the linear-solve capacity, not a hole. And I keep the mask register for X."

The senior reads a compressed 'hard fault' as the linear-solve limit and splits / test-points / lowers ratio — never assumes a hole.

12. Silicon Impact

EDT-style compression is the concrete, industrially-dominant way the decompressor/compactor of 7.2 is built, and its linear structure is what makes compression both powerful and predictable. The decompressor — a ring generator (LFSR-like) fed every cycle plus a phase shifter — is linear, so each care bit becomes a linear equation over the input-stream bits, and compression-aware ATPG can solve for the input stream that deterministically produces all of a pattern's care bits. That's the 'embedded deterministic' guarantee: you don't get random patterns squeezed through few pins — you get the exact ATPG-computed patterns, so coverage is preserved (for solvable patterns). It also makes the chapter's central limit rigorous: the compression ratio is bounded because the linear system has finite capacity — a care-bit-dense pattern (often a hard-to-control/observe fault, 5.2) can over-constrain the few input variables, so ATPG splits it (a few extra patterns) or a test point (6.4) thins the care bits — behavior that is by-design, not a hole. On the output side, the XOR-tree compactor with a mask register operationalizes X-handling: mask bits gate off X-carrying chains before the XOR, the mechanism 7.4 will trade against coverage. The reason to learn EDT-style specifically — while keeping it tool-neutral — is that its two ideas, the linear solve and the masked XOR, generalize across compression schemes, giving the DFT engineer the exact vocabulary to reason about ratio, care-bit density, splitting, and masking. For the RTL/DV engineer, the actionable connections are that dense (hard) faults cost extra compressed patterns — a test-point signal — and that X-sources drive mask usage — a fix-at-the-source signal — both of which come to a head in the coverage/X trade-offs (7.4) and the compression-loss debug (7.5) on the project's mini-SoC.

13. Engineering Checklist

  • Used a linear decompressor (ring generator + phase shifter), fed each cycle (stream, not seed).
  • Confirmed compression-aware ATPG solves the care-bit linear system for the input stream (embedded deterministic).
  • Allowed pattern splitting for care-bit-dense faults; used test points (6.4) to thin where needed.
  • Configured the XOR compactor with a mask register for X (7.4); mitigated aliasing.
  • Baselined compressed coverage against uncompressed; set ratio to care-bit density (7.2).

14. Try Yourself

  1. Sketch a ring generator + phase shifter feeding many chains; note it's fed every cycle (a stream).
  2. Express a care bit as a linear XOR of input-stream bits — see why a pattern's care bits form a linear system.
  3. Explain the embedded deterministic idea: ATPG solves for the input stream that produces the exact care bits.
  4. Take a dense care-bit pattern and show the system is over-constrained → ATPG splits it (or test-point).
  5. Add a mask register to the XOR compactor and show it gates off an X-carrying chain (7.4).

The scheme is representative and tool-neutral; the linear-solve/masked-XOR ideas generalize. Real EDT-style flows come from the compression tool. No paid tool required to reason about it.

15. Interview Perspective

  • Weak: "EDT compresses the scan patterns."
  • Good: "A ring generator and phase shifter decompress few pins to many chains, and an XOR compactor merges the outputs."
  • Senior: "EDT-style uses a ring generator (LFSR-like) fed every shift cycle plus a phase shifter (XOR) to spread the few scan-in bits across many chains — a linear network. Because it's linear, each care bit is a linear equation over the input-stream bits, so compression-aware ATPG solves for the input stream that deterministically produces all of a pattern's care bits — that's embedded deterministic: the exact ATPG patterns through few pins, so coverage is preserved. The ratio is bounded by care-bit density: a dense (hard-fault) pattern over-constrains the small system, so ATPG splits it (or a test point thins the care bits). The compactor is an XOR tree with a mask register that gates off X-carrying chains before the XOR (X-masking, 7.4). It's representative — the linear-solve + masked-XOR ideas generalize."

16. Interview / Review Questions

17. Key Takeaways

  • EDT-style compression realizes 7.2's decompressor as a ring generator (LFSR-like) fed every shift cycle plus a phase shifter (XOR) that spreads the few scan-in bits across many decorrelated chains — a linear network.
  • Because the network is linear, each care bit is a linear equation over the input-stream bits, and compression-aware ATPG solves the system for the input stream that deterministically produces all of a pattern's care bits — the 'embedded deterministic' guarantee that preserves coverage.
  • The compactor is an XOR tree with a mask register that gates off X-carrying chains before the XOR, operationalizing X-masking (7.4); aliasing is mitigated by design.
  • The ratio is bounded by care-bit density: a care-bit-dense (hard-fault) pattern over-constrains the linear system, so ATPG splits it into more compressed patterns (still detected) or a test point (6.4) thins the care bits — the linear-solve limit, not a coverage hole.
  • EDT-style is representative and tool-neutral — its two ideas, the linear care-bit solve and the masked-XOR compactor, generalize across compression schemes, and are the vocabulary for the coverage/X trade-offs (7.4) and compression-loss debug (7.5). Next: 7.4 — compression vs coverage vs X-handling.

18. Quick Revision

EDT-style scan compression (representative, tool-neutral). Decompressor = RING GENERATOR (LFSR-like, fed EACH cycle -> a stream) + PHASE SHIFTER (XOR) spreading few scan-in bits across many decorrelated chains -- a LINEAR network. So each CARE bit = a linear equation over GF(2) in the input-stream bits -> compression-aware ATPG SOLVES for the input stream that deterministically produces ALL care bits = EMBEDDED DETERMINISTIC (exact ATPG patterns, coverage preserved). Compactor = XOR TREE + MASK REGISTER (gates off X-carrying chains before the XOR -> X-masking, 7.4). Ratio 10-100x, bounded by care-bit density: a dense (hard-fault) pattern over-constrains the small system -> ATPG SPLITS it (+patterns, still detected) or a test point (6.4) thins care bits. Linear-solve limit, NOT a hole. Next: 7.4 — compression vs coverage vs X-handling.