162Total chapters
22Modules
162Chapters live
22 / 22Active modules
Coherency first, not packets
MSI / MESI / MOESI / MESIF before CHI opcodes — the mental model that turns CHI from cryptic to obvious. Every later module rides on these foundations.
Interview-ready depth
A dedicated interview module plus per-chapter interview weighting — RN vs HN, ReadUnique flow, deadlock-avoidance rules, credit mechanisms, coherency-bug debug.
Design → verify → debug
RTL pipelines (request / snoop / directory), distributed scoreboards, SVA, and waveform-based debugging — the full engineering loop for a coherent SoC.
AMBA CHI Complete Curriculum
Your Learning Roadmap
162 chapters · 22 modules — cache coherency, RN/HN/SN nodes, and distributed-directory fabrics.
162of 162 chapters live
100% complete
Module 1
Cache Coherency Foundations
Module 2
Coherency Protocol Foundations
Module 3
Why CHI Exists
Module 4
CHI Architecture Overview
Module 5
CHI System Components
Module 6
CHI Channels
Module 7
CHI Transaction Model
Module 8
Request Flows
Module 9
Snoop Flows
Module 10
Cache State Management
Module 11
Directory-Based Coherency
Module 12
Ordering and Consistency
Module 13
CHI Data Transfers
Module 14
CHI Flow Control
Module 15
CHI Performance
Module 16
CHI RTL Design Thinking
Module 17
CHI Verification
Module 18
CHI Debugging
Module 19
CHI Interview Mastery
Module 20
Real Industry Case Studies
Module 21
CHI Design-Review Checklist