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VLSI Mentor
314Total chapters
29Modules
314Chapters live
29 / 29Active modules

Two parts, one dependency chain

Part I is a complete Perl education that stands on its own — sigils, scalar and list context, operators, quoting, arrays, hashes, references and nested data structures, subroutines, packages, file handling and command-line Perl, with no semiconductor knowledge assumed. Part II builds on it and never re-teaches it, applying the same language to RTL, verification and signoff data.

Regex and references, in full

A twenty-two-chapter regular-expression path that builds every pattern symbol by symbol from a literal match to qr// and lookaround, and a full module on references — because in Perl a hash of hashes is not possible without them. Per-chapter interview weighting marks what an established team actually asks: context, == versus eq, capture groups, autovivification, migration pitfalls.

Read → maintain → migrate

From the first regex to a per-corner STA report parser, a log-triage tool that reduces a hundred failures to a handful of signatures, a regression dashboard, and a Perl → Python migration validated byte for byte before cutover — the full lifecycle a team with legacy EDA Perl eventually owns.

Perl Complete Curriculum

Your Learning Roadmap

314 chapters · 29 modules — two parts — Perl taught from zero, then the Perl a semiconductor engineer needs for log parsing, filelists, netlists, STA and synthesis reports, regression automation and the migration path off legacy infrastructure.

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Part I — Perl Basics & Fundamentals

Perl taught from zero: running your first script, scalars and sigils, context, operators, strings and quoting, arrays, hashes, references and nested data structures, conditions, loops, subroutines, regular expressions, packages and modules, file handling, errors and debugging, and command-line Perl. No VLSI knowledge required.

Part II — Perl for VLSI Engineering

The Perl fundamentals from Part I applied to real semiconductor engineering workflows, and never re-teaching them: engineering file trees, log parsing, RTL filelist generation, netlist processing, simulation and UVM log analysis, synthesis and STA report parsing, coverage and regression reporting, regression automation, Bash/Tcl/EDA integration, testing and maintenance, legacy migration, and end-to-end automation projects.