5.2.4. Scalar vs Vector vs Array
Scalar Data Types
Scalars are single-bit data elements that can hold one of the four logic values (0, 1, X, Z).
Verilog
reg scalar_reg; // 1-bit scalar reg
integer scalar_int; // 32-bit scalar integer
real scalar_real; // 64-bit scalar real
A single bit (4-state: 1'b1, 1'b0, 1'bz, 1'bx)
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Both nets (wire) and variables (reg) can be scalar.
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Hardware Intuition: One wire or one flip-flop.
Verilog
module sdv();
reg s_reg; // 1-bit storage
wire s_wire; // 1-bit net ​
// reg can be assigned only by
// procedural/behavioural assignments
initial begin
s_reg = 1'b1;
end
// wire can be assigned by continuous
// assignments
assign s_wire = 1'b1;
endmodule
Vector Data Types
Vectors are multi-bit data elements that can hold multiple bits organized as a single unit.
Verilog
reg [7:0] vector_reg; // 8-bit vector (MSB=7, LSB=0)
reg [15:0] data_bus; // 16-bit vector
reg [31:0] instruction; // 32-bit vector
Vector = Multiple bits packed together (a bus)
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Both nets (wire) and variables (reg) can be scalar.
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Hardware Intuition: A bundle of wires or a bank of flip-flops (one per bit).
Verilog
module sdv();
reg [7:0] byte; // 8-bits [MSB:LSB]
wire [3:0] nibble; // 4-bit net bus
initial begin
byte = 8'hA5;
end
assign nibble = byte[3:0];
endmodule
Vector Bit Selection and Part Selection
Verilog
reg [7:0] data = 8'b10110101;
// Bit selection
wire bit_3 = data[3]; // Selects bit 3 (value: 0)
wire bit_7 = data[7]; // Selects bit 7 (value: 1)
// Part selection
wire [3:0] upper_nibble = data[7:4]; // Gets bits [7:4] = 4'b1011
wire [3:0] lower_nibble = data[3:0]; // Gets bits [3:0] = 4'b0101
Array Data Types
Arrays are collections of elements (scalars or vectors) that can be accessed using indices.
Verilog
reg [7:0] memory [0:255]; // Array of 256 8-bit vectors
reg flags [0:31]; // Array of 32 scalar bits
integer coefficients [0:15]; // Array of 16 integers
real samples [0:1023]; // Array of 1024 real values
Array Access Examples
Verilog
module array_examples;
reg [7:0] ram [0:1023]; // 1KB memory array
reg status_flags [0:15]; // 16 status flags
integer lookup_table [0:255]; // Integer lookup table
initial begin
// Array initialization
ram[0] = 8'hAA;
ram[1] = 8'h55;
status_flags[5] = 1'b1;
lookup_table[100] = 42;
// Array access
$display("RAM[0] = %h", ram[0]);
$display("Status flag 5 = %b", status_flags[5]);
$display("Lookup[100] = %d", lookup_table[100]);
end
endmodule