10.2. Verilog Arithmetic Operators: Mathematical Operations in Hardware
Introduction
Arithmetic operators are the workhorses of digital design, performing mathematical computations that translate directly into hardware arithmetic units. Unlike software where arithmetic is simply a computation, in Verilog, every arithmetic operation implies actual silicon—adders, multipliers, subtractors—with real area, power, and timing implications.
Understanding arithmetic operators goes beyond syntax; it requires knowledge of hardware costs, synthesis considerations, overflow handling, and efficient design techniques. At VLSI Mentor, we emphasize that great RTL designers understand not just what arithmetic operators do, but how they map to hardware and how to use them efficiently.
Hardware Cost: Low < Medium < High < Very High (in terms of area × delay)
10.2.1. Arithmetic Operators Overview
10.2.2. Addition Operator (+)
10.2.2.1. Basic Addition
Addition is one of the most fundamental and frequently used operations in digital design.
Verilog
10.2.2.2. Addition Width Rules
Critical Rule: Result width should be at least `max(width_a, width_b) + 1` to accommodate carry.
Verilog
10.2.2.3. Signed Addition
Verilog
10.2.2.4. Practical Adder Designs
Verilog
10.2.3. Subtraction Operator (-)
10.2.3.1. Basic Subtraction
Verilog
10.2.3.2. Subtraction Variants
Verilog
10.2.4. Multiplication Operator (*)
WARNING: Multiplication is expensive in hardware!
10.2.4.1. Basic Multiplication
Verilog
10.2.4.2 Efficient Multiplication Techniques
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Key Takeaway: For power-of-2 multiplication, ALWAYS use shifts instead of `*` operator!
10.2.5. Division (/) and Modulus (%)
⚠️ CRITICAL WARNING: Division and modulus are extremely expensive in hardware and should be avoided whenever possible!
10.2.5.1. Basic Division and Modulus
Verilog
10.2.5.2. Efficient Alternatives to Division
Verilog
Golden Rule:
- For division by 2^N → Use `>> N`
- For modulus by 2^N → Use `& (2^N - 1)
10.2.6. Unary Plus (+) and Unary Minus (-)
10.2.6.1. Unary Plus
The unary plus operator has no effect and is rarely used:
Verilog
10.2.6.2. Unary Minus (Two's Complement Negation)
Verilog
10.2.7. Complete ALU Example
Here's a production-quality ALU demonstrating all arithmetic operators:
Verilog
10.2.8. Hardware Cost Analysis
Area and Timing Comparison
Recommendations:
1. ✅ Use shifts for multiply/divide by powers of 2
2. ✅ Use addition trees instead of multiplication when possible
3. ✅ Consider lookup tables for small constant operations
4. ❌ Avoid division unless absolutely necessary
5. ❌ Don't use modulus in critical paths
10.2.9. Synthesis Guidelines
10.2.9.1. DO's
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10.2.9.2. DON'Ts
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10.2.10. Common Pitfalls
Pitfall 1: Overflow/Underflow
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Pitfall 2: Signed vs Unsigned
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Pitfall 3: Using * Instead of <<
Verilog